From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23470 invoked by alias); 12 Mar 2008 20:05:03 -0000 Received: (qmail 23460 invoked by uid 22791); 12 Mar 2008 20:05:02 -0000 X-Spam-Check-By: sourceware.org Received: from mail.oarcorp.com (HELO OARmail.OARCORP.com) (216.186.189.5) by sourceware.org (qpsmtpd/0.31) with ESMTP; Wed, 12 Mar 2008 20:04:45 +0000 Received: from [192.168.1.3] (192.168.1.3) by OARmail.OARCORP.com (192.168.2.2) with Microsoft SMTP Server (TLS) id 8.1.263.0; Wed, 12 Mar 2008 15:02:03 -0500 Message-ID: <47D83759.3070509@oarcorp.com> Date: Wed, 12 Mar 2008 20:05:00 -0000 From: Joel Sherrill User-Agent: Thunderbird 2.0.0.12 (X11/20080226) MIME-Version: 1.0 To: GCC Patches Subject: testsuite run-time test for sse2 support Content-Type: multipart/mixed; boundary="------------080002000408070907040507" Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2008-03/txt/msg00756.txt.bz2 --------------080002000408070907040507 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Content-length: 863 Hi, As the traffic over on gcc indicates, I have been testing on an i386 target with no fancy extensions. Since RTEMS multilibs a lot of variants, the toolset supports more than the target hardware. The attached patch adds a run-time check for SSE2 support. I think I picked an instruction that only shows up at >= SSE2. At this point, I didn't see any need to test for each level individually. OK to commit? 2008-03-12 Joel Sherrill * gcc.dg/vect/vect.exp: Add check for target hardware supporting SSE2. * lib/target-supports.exp: Add check_sse2_hw_available function. -- Joel Sherrill, Ph.D. Director of Research & Development joel.sherrill@OARcorp.com On-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available (256) 722-9985 --------------080002000408070907040507 Content-Type: text/x-patch; name="sse2_test.diff" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="sse2_test.diff" Content-length: 1859 Index: gcc.dg/vect/vect.exp =================================================================== --- gcc.dg/vect/vect.exp (revision 133085) +++ gcc.dg/vect/vect.exp (working copy) @@ -1,4 +1,4 @@ -# Copyright (C) 1997, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. +# Copyright (C) 1997, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -63,7 +63,11 @@ set dg-do-what-default run } elseif { [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] } { lappend DEFAULT_VECTCFLAGS "-msse2" - set dg-do-what-default run + if [check_sse2_hw_available] { + set dg-do-what-default run + } else { + set dg-do-what-default compile + } } elseif { [istarget "mips*-*-*"] && [check_effective_target_mpaired_single] && [check_effective_target_nomips16] } { Index: lib/target-supports.exp =================================================================== --- lib/target-supports.exp (revision 133085) +++ lib/target-supports.exp (working copy) @@ -1,4 +1,4 @@ -# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007 +# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007, 2008 # Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify @@ -1194,6 +1194,20 @@ } "-mfpu=neon -mfloat-abi=softfp"] } +# Return 1 if the target supports executing MMX instructions, 0 +# otherwise. Cache the result. + +proc check_sse2_hw_available { } { + return [check_runtime x86_sse2_hw_available { + int + main (void) + { + asm volatile ("paddq %xmm0,%xmm0"); + return 0; + } + } "-msse2"] +} + # Return 1 if this is a PowerPC target with floating-point registers. proc check_effective_target_powerpc_fprs { } { --------------080002000408070907040507--