LGTM. Thanks. juzhe.zhong@rivai.ai From: Li Xu Date: 2023-12-05 16:38 To: gcc-patches CC: kito.cheng; palmer; juzhe.zhong; xuli Subject: [PATCH v2] RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32 From: xuli This patch fixs the issue of g++.dg/torture/vshuf-v2di.C and g++.dg/torture/vshuf-v4di.C -Os execution failure with -march=rv32gcv -mabi=ilp32d. Consider the following code: typedef unsigned long long V __attribute__((vector_size(16))); .LC0: 0xc1c2c3c4c5c6c7c8 before this patch: lui a5,%hi(.LC0) addi a5,a5,%lo(.LC0) lw a6,4(a5)//0xc1c2c3c4 lw a5,0(a5)//0xc5c6c7c8 vsetivli zero,2,e64,m1,ta,mu vmv.v.x v2,a5//v2 is {0xffffffffc5c6c7c8, 0xffffffffc5c6c7c8} after this patch: lui a5,%hi(.LC0) addi a5,a5,%lo(.LC0) vsetivli zero,2,e64,m1,ta,mu vlse64.v v2,0(a5),zero//v2 is {0xc1c2c3c4c5c6c7c8, 0xc1c2c3c4c5c6c7c8} gcc/ChangeLog: * config/riscv/riscv-v.cc (sew64_scalar_helper): Bugfix. --- gcc/config/riscv/riscv-v.cc | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index 588c127343e..2799a216a0b 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -1728,7 +1728,12 @@ sew64_scalar_helper (rtx *operands, rtx *scalar_op, rtx vl, } if (CONST_INT_P (*scalar_op)) - *scalar_op = force_reg (scalar_mode, *scalar_op); + { + if (maybe_gt (GET_MODE_SIZE (scalar_mode), GET_MODE_SIZE (Pmode))) + *scalar_op = force_const_mem (scalar_mode, *scalar_op); + else + *scalar_op = force_reg (scalar_mode, *scalar_op); + } rtx tmp = gen_reg_rtx (vector_mode); rtx ops[] = {tmp, *scalar_op}; -- 2.17.1