* PATCH: Pass -msse2avx to assembler for -mavx
@ 2008-09-29 21:23 H.J. Lu
2008-09-30 9:26 ` Richard Henderson
0 siblings, 1 reply; 2+ messages in thread
From: H.J. Lu @ 2008-09-29 21:23 UTC (permalink / raw)
To: gcc-patches; +Cc: ubizjak, jh
Linux x86 assembler supports -msse2avx, which encodes SSE instructions
with VEX prefix. It will turn inline SSE instructions into AVX
instructions. This patch passes -msse2avx to as for -mavx and adds
-msse2avx to gcc so that it can be turned off with -mno-sse2avx. OK
for trunk?
Thanks.
H.J.
---
2008-09-29 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.opt: Add msse2avx.
* config/i386/linux.h (ASM_SPEC): New. Support -msse2avx.
* config/i386/linux64.h (ASM_SPEC): Likewise.
* doc/invoke.texi: Document -msse2avx.
--- gcc/config/i386/i386.opt.avx 2008-09-29 09:31:58.000000000 -0700
+++ gcc/config/i386/i386.opt 2008-09-29 10:01:58.000000000 -0700
@@ -342,3 +342,7 @@ Support AES built-in functions and code
mpclmul
Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) VarExists Save
Support PCLMUL built-in functions and code generation
+
+msse2avx
+Target Report Var(ix86_sse2avx)
+Encode SSE instructions with VEX prefix
--- gcc/config/i386/linux.h.avx 2008-07-02 09:06:34.000000000 -0700
+++ gcc/config/i386/linux.h 2008-09-29 10:39:26.000000000 -0700
@@ -102,6 +102,11 @@ along with GCC; see the file COPYING3.
#define LINK_EMULATION "elf_i386"
#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
+#undef ASM_SPEC
+#define ASM_SPEC \
+ "%{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \
+ %{!mno-sse2avx:%{mavx:-msse2avx}} %{msse2avx:%{!mavx:-msse2avx}}"
+
#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
{ "link_emulation", LINK_EMULATION },\
--- gcc/config/i386/linux64.h.avx 2008-07-02 09:06:34.000000000 -0700
+++ gcc/config/i386/linux64.h 2008-09-29 10:35:41.000000000 -0700
@@ -56,6 +56,11 @@ along with GCC; see the file COPYING3.
#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
+#undef ASM_SPEC
+#define ASM_SPEC "%{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} \
+ %{Wa,*:%*} %{m32:--32} %{m64:--64} \
+ %{!mno-sse2avx:%{mavx:-msse2avx}} %{msse2avx:%{!mavx:-msse2avx}}"
+
#if TARGET_64BIT_DEFAULT
#define SPEC_32 "m32"
#define SPEC_64 "!m32"
--- gcc/doc/invoke.texi.avx 2008-09-25 17:09:34.000000000 -0700
+++ gcc/doc/invoke.texi 2008-09-29 11:06:27.000000000 -0700
@@ -581,7 +581,7 @@ Objective-C and Objective-C++ Dialects}.
-momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol
-mcmodel=@var{code-model} @gol
-m32 -m64 -mlarge-data-threshold=@var{num} @gol
--mfused-madd -mno-fused-madd}
+-mfused-madd -mno-fused-madd -msse2avx}
@emph{IA-64 Options}
@gccoptlist{-mbig-endian -mlittle-endian -mgnu-as -mgnu-ld -mno-pic @gol
@@ -11212,6 +11212,12 @@ Enable automatic generation of fused flo
if the ISA supports such instructions. The -mfused-madd option is on by
default. The fused multiply-add instructions have a different
rounding behavior compared to executing a multiply followed by an add.
+
+@item -msse2avx
+@itemx -mno-sse2avx
+@opindex msse2avx
+Specify that the assembler should encode SSE instructions with VEX
+prefix. The option @option{-mavx} turns this on by default.
@end table
These @samp{-m} switches are supported in addition to the above
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: PATCH: Pass -msse2avx to assembler for -mavx
2008-09-29 21:23 PATCH: Pass -msse2avx to assembler for -mavx H.J. Lu
@ 2008-09-30 9:26 ` Richard Henderson
0 siblings, 0 replies; 2+ messages in thread
From: Richard Henderson @ 2008-09-30 9:26 UTC (permalink / raw)
To: H.J. Lu; +Cc: gcc-patches, ubizjak, jh
Ok.
r~
^ permalink raw reply [flat|nested] 2+ messages in thread
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2008-09-29 21:23 PATCH: Pass -msse2avx to assembler for -mavx H.J. Lu
2008-09-30 9:26 ` Richard Henderson
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