diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index e31c2e8fdc4f500bf9408d05ad86e151397627f7..47eead71d9515b4103a5b66999a3f9357dc3c3be 100644 --- a/gcc/config/arm/arm_mve.h +++ b/gcc/config/arm/arm_mve.h @@ -13585,29 +13585,33 @@ __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_vdwdupq_m_n_uv16qi (__inactive, __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_vdwdupq_m_n_uv16qi (__inactive, __a, __c, __imm, __p); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_vdwdupq_m_n_uv4si (__inactive, __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_vdwdupq_m_n_uv4si (__inactive, __a, __c, __imm, __p); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_vdwdupq_m_n_uv8hi (__inactive, __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_vdwdupq_m_n_uv8hi (__inactive, __a, __c, __imm, __p); } __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint8x16_t __res = __builtin_mve_vdwdupq_m_n_uv16qi (__inactive, *__a, __b, __imm, __p); - *__a = __builtin_mve_vdwdupq_m_wb_uv16qi (__inactive, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint8x16_t __res = __builtin_mve_vdwdupq_m_n_uv16qi (__inactive, *__a, __c, __imm, __p); + *__a = __builtin_mve_vdwdupq_m_wb_uv16qi (__inactive, *__a, __c, __imm, __p); return __res; } @@ -13615,8 +13619,9 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint32x4_t __res = __builtin_mve_vdwdupq_m_n_uv4si (__inactive, *__a, __b, __imm, __p); - *__a = __builtin_mve_vdwdupq_m_wb_uv4si (__inactive, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint32x4_t __res = __builtin_mve_vdwdupq_m_n_uv4si (__inactive, *__a, __c, __imm, __p); + *__a = __builtin_mve_vdwdupq_m_wb_uv4si (__inactive, *__a, __c, __imm, __p); return __res; } @@ -13624,8 +13629,9 @@ __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint16x8_t __res = __builtin_mve_vdwdupq_m_n_uv8hi (__inactive, *__a, __b, __imm, __p); - *__a = __builtin_mve_vdwdupq_m_wb_uv8hi (__inactive, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint16x8_t __res = __builtin_mve_vdwdupq_m_n_uv8hi (__inactive, *__a, __c, __imm, __p); + *__a = __builtin_mve_vdwdupq_m_wb_uv8hi (__inactive, *__a, __c, __imm, __p); return __res; } @@ -13633,29 +13639,33 @@ __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_n_u8 (uint32_t __a, uint32_t __b, const int __imm) { - return __builtin_mve_vdwdupq_n_uv16qi (__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_vdwdupq_n_uv16qi (__a, __c, __imm); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_n_u32 (uint32_t __a, uint32_t __b, const int __imm) { - return __builtin_mve_vdwdupq_n_uv4si (__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_vdwdupq_n_uv4si (__a, __c, __imm); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_n_u16 (uint32_t __a, uint32_t __b, const int __imm) { - return __builtin_mve_vdwdupq_n_uv8hi (__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_vdwdupq_n_uv8hi (__a, __c, __imm); } __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_wb_u8 (uint32_t * __a, uint32_t __b, const int __imm) { - uint8x16_t __res = __builtin_mve_vdwdupq_n_uv16qi (*__a, __b, __imm); - *__a = __builtin_mve_vdwdupq_wb_uv16qi (*__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + uint8x16_t __res = __builtin_mve_vdwdupq_n_uv16qi (*__a, __c, __imm); + *__a = __builtin_mve_vdwdupq_wb_uv16qi (*__a, __c, __imm); return __res; } @@ -13663,8 +13673,9 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_wb_u32 (uint32_t * __a, uint32_t __b, const int __imm) { - uint32x4_t __res = __builtin_mve_vdwdupq_n_uv4si (*__a, __b, __imm); - *__a = __builtin_mve_vdwdupq_wb_uv4si (*__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + uint32x4_t __res = __builtin_mve_vdwdupq_n_uv4si (*__a, __c, __imm); + *__a = __builtin_mve_vdwdupq_wb_uv4si (*__a, __c, __imm); return __res; } @@ -13672,8 +13683,9 @@ __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_wb_u16 (uint32_t * __a, uint32_t __b, const int __imm) { - uint16x8_t __res = __builtin_mve_vdwdupq_n_uv8hi (*__a, __b, __imm); - *__a = __builtin_mve_vdwdupq_wb_uv8hi (*__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + uint16x8_t __res = __builtin_mve_vdwdupq_n_uv8hi (*__a, __c, __imm); + *__a = __builtin_mve_vdwdupq_wb_uv8hi (*__a, __c, __imm); return __res; } @@ -13804,29 +13816,33 @@ __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_m_n_u8 (uint8x16_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_viwdupq_m_n_uv16qi (__inactive, __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_viwdupq_m_n_uv16qi (__inactive, __a, __c, __imm, __p); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_m_n_u32 (uint32x4_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_viwdupq_m_n_uv4si (__inactive, __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_viwdupq_m_n_uv4si (__inactive, __a, __c, __imm, __p); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_m_n_u16 (uint16x8_t __inactive, uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_viwdupq_m_n_uv8hi (__inactive, __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_viwdupq_m_n_uv8hi (__inactive, __a, __c, __imm, __p); } __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_m_wb_u8 (uint8x16_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint8x16_t __res = __builtin_mve_viwdupq_m_n_uv16qi (__inactive, *__a, __b, __imm, __p); - *__a = __builtin_mve_viwdupq_m_wb_uv16qi (__inactive, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint8x16_t __res = __builtin_mve_viwdupq_m_n_uv16qi (__inactive, *__a, __c, __imm, __p); + *__a = __builtin_mve_viwdupq_m_wb_uv16qi (__inactive, *__a, __c, __imm, __p); return __res; } @@ -13834,8 +13850,9 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_m_wb_u32 (uint32x4_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint32x4_t __res = __builtin_mve_viwdupq_m_n_uv4si (__inactive, *__a, __b, __imm, __p); - *__a = __builtin_mve_viwdupq_m_wb_uv4si (__inactive, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint32x4_t __res = __builtin_mve_viwdupq_m_n_uv4si (__inactive, *__a, __c, __imm, __p); + *__a = __builtin_mve_viwdupq_m_wb_uv4si (__inactive, *__a, __c, __imm, __p); return __res; } @@ -13843,8 +13860,9 @@ __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_m_wb_u16 (uint16x8_t __inactive, uint32_t * __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint16x8_t __res = __builtin_mve_viwdupq_m_n_uv8hi (__inactive, *__a, __b, __imm, __p); - *__a = __builtin_mve_viwdupq_m_wb_uv8hi (__inactive, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint16x8_t __res = __builtin_mve_viwdupq_m_n_uv8hi (__inactive, *__a, __c, __imm, __p); + *__a = __builtin_mve_viwdupq_m_wb_uv8hi (__inactive, *__a, __c, __imm, __p); return __res; } @@ -13852,29 +13870,33 @@ __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_n_u8 (uint32_t __a, uint32_t __b, const int __imm) { - return __builtin_mve_viwdupq_n_uv16qi (__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_viwdupq_n_uv16qi (__a, __c, __imm); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_n_u32 (uint32_t __a, uint32_t __b, const int __imm) { - return __builtin_mve_viwdupq_n_uv4si (__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_viwdupq_n_uv4si (__a, __c, __imm); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_n_u16 (uint32_t __a, uint32_t __b, const int __imm) { - return __builtin_mve_viwdupq_n_uv8hi (__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_viwdupq_n_uv8hi (__a, __c, __imm); } __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_wb_u8 (uint32_t * __a, uint32_t __b, const int __imm) { - uint8x16_t __res = __builtin_mve_viwdupq_n_uv16qi (*__a, __b, __imm); - *__a = __builtin_mve_viwdupq_wb_uv16qi (*__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + uint8x16_t __res = __builtin_mve_viwdupq_n_uv16qi (*__a, __c, __imm); + *__a = __builtin_mve_viwdupq_wb_uv16qi (*__a, __c, __imm); return __res; } @@ -13882,8 +13904,9 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_wb_u32 (uint32_t * __a, uint32_t __b, const int __imm) { - uint32x4_t __res = __builtin_mve_viwdupq_n_uv4si (*__a, __b, __imm); - *__a = __builtin_mve_viwdupq_wb_uv4si (*__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + uint32x4_t __res = __builtin_mve_viwdupq_n_uv4si (*__a, __c, __imm); + *__a = __builtin_mve_viwdupq_wb_uv4si (*__a, __c, __imm); return __res; } @@ -13891,11 +13914,13 @@ __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_wb_u16 (uint32_t * __a, uint32_t __b, const int __imm) { - uint16x8_t __res = __builtin_mve_viwdupq_n_uv8hi (*__a, __b, __imm); - *__a = __builtin_mve_viwdupq_wb_uv8hi (*__a, __b, __imm); + uint64_t __c = ((uint64_t) __b) << 32; + uint16x8_t __res = __builtin_mve_viwdupq_n_uv8hi (*__a, __c, __imm); + *__a = __builtin_mve_viwdupq_wb_uv8hi (*__a, __c, __imm); return __res; } + __extension__ extern __inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vldrdq_gather_base_wb_s64 (uint64x2_t * __addr, const int __offset) @@ -14095,30 +14120,34 @@ __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_x_n_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_vdwdupq_m_n_uv16qi (vuninitializedq_u8 (), __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_vdwdupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __c, __imm, __p); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_x_n_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_vdwdupq_m_n_uv8hi (vuninitializedq_u16 (), __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_vdwdupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __c, __imm, __p); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_x_n_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_vdwdupq_m_n_uv4si (vuninitializedq_u32 (), __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_vdwdupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __c, __imm, __p); } __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_x_wb_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint8x16_t __arg1 = vuninitializedq_u8 (); - uint8x16_t __res = __builtin_mve_vdwdupq_m_n_uv16qi (__arg1, *__a, __b, __imm, __p); - *__a = __builtin_mve_vdwdupq_m_wb_uv16qi (__arg1, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint8x16_t __arg1 = __arm_vuninitializedq_u8 (); + uint8x16_t __res = __builtin_mve_vdwdupq_m_n_uv16qi (__arg1, *__a, __c, __imm, __p); + *__a = __builtin_mve_vdwdupq_m_wb_uv16qi (__arg1, *__a, __c, __imm, __p); return __res; } @@ -14126,9 +14155,10 @@ __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_x_wb_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint16x8_t __arg1 = vuninitializedq_u16 (); - uint16x8_t __res = __builtin_mve_vdwdupq_m_n_uv8hi (__arg1, *__a, __b, __imm, __p); - *__a = __builtin_mve_vdwdupq_m_wb_uv8hi (__arg1, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint16x8_t __arg1 = __arm_vuninitializedq_u16 (); + uint16x8_t __res = __builtin_mve_vdwdupq_m_n_uv8hi (__arg1, *__a, __c, __imm, __p); + *__a = __builtin_mve_vdwdupq_m_wb_uv8hi (__arg1, *__a, __c, __imm, __p); return __res; } @@ -14136,9 +14166,10 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_vdwdupq_x_wb_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint32x4_t __arg1 = vuninitializedq_u32 (); - uint32x4_t __res = __builtin_mve_vdwdupq_m_n_uv4si (__arg1, *__a, __b, __imm, __p); - *__a = __builtin_mve_vdwdupq_m_wb_uv4si (__arg1, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint32x4_t __arg1 = __arm_vuninitializedq_u32 (); + uint32x4_t __res = __builtin_mve_vdwdupq_m_n_uv4si (__arg1, *__a, __c, __imm, __p); + *__a = __builtin_mve_vdwdupq_m_wb_uv4si (__arg1, *__a, __c, __imm, __p); return __res; } @@ -14197,30 +14228,34 @@ __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_x_n_u8 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_viwdupq_m_n_uv16qi (vuninitializedq_u8 (), __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_viwdupq_m_n_uv16qi (__arm_vuninitializedq_u8 (), __a, __c, __imm, __p); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_x_n_u16 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_viwdupq_m_n_uv8hi (vuninitializedq_u16 (), __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_viwdupq_m_n_uv8hi (__arm_vuninitializedq_u16 (), __a, __c, __imm, __p); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_x_n_u32 (uint32_t __a, uint32_t __b, const int __imm, mve_pred16_t __p) { - return __builtin_mve_viwdupq_m_n_uv4si (vuninitializedq_u32 (), __a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + return __builtin_mve_viwdupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __c, __imm, __p); } __extension__ extern __inline uint8x16_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_x_wb_u8 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint8x16_t __arg1 = vuninitializedq_u8 (); - uint8x16_t __res = __builtin_mve_viwdupq_m_n_uv16qi (__arg1, *__a, __b, __imm, __p); - *__a = __builtin_mve_viwdupq_m_wb_uv16qi (__arg1, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint8x16_t __arg1 = __arm_vuninitializedq_u8 (); + uint8x16_t __res = __builtin_mve_viwdupq_m_n_uv16qi (__arg1, *__a, __c, __imm, __p); + *__a = __builtin_mve_viwdupq_m_wb_uv16qi (__arg1, *__a, __c, __imm, __p); return __res; } @@ -14228,9 +14263,10 @@ __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_x_wb_u16 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint16x8_t __arg1 = vuninitializedq_u16 (); - uint16x8_t __res = __builtin_mve_viwdupq_m_n_uv8hi (__arg1, *__a, __b, __imm, __p); - *__a = __builtin_mve_viwdupq_m_wb_uv8hi (__arg1, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint16x8_t __arg1 = __arm_vuninitializedq_u16 (); + uint16x8_t __res = __builtin_mve_viwdupq_m_n_uv8hi (__arg1, *__a, __c, __imm, __p); + *__a = __builtin_mve_viwdupq_m_wb_uv8hi (__arg1, *__a, __c, __imm, __p); return __res; } @@ -14238,9 +14274,10 @@ __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_viwdupq_x_wb_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t __p) { - uint32x4_t __arg1 = vuninitializedq_u32 (); - uint32x4_t __res = __builtin_mve_viwdupq_m_n_uv4si (__arg1, *__a, __b, __imm, __p); - *__a = __builtin_mve_viwdupq_m_wb_uv4si (__arg1, *__a, __b, __imm, __p); + uint64_t __c = ((uint64_t) __b) << 32; + uint32x4_t __arg1 = __arm_vuninitializedq_u32 (); + uint32x4_t __res = __builtin_mve_viwdupq_m_n_uv4si (__arg1, *__a, __c, __imm, __p); + *__a = __builtin_mve_viwdupq_m_wb_uv4si (__arg1, *__a, __c, __imm, __p); return __res; } diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 10abc3fae3709891346b63213afb1fe3754af41a..4a506cc3861534b4ddc30ba8f4f3c4ec28a8cc69 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -9853,7 +9853,7 @@ (define_insn "mve_vddupq_m_wb_u_insn" (define_expand "mve_vdwdupq_n_u" [(match_operand:MVE_2 0 "s_register_operand") (match_operand:SI 1 "s_register_operand") - (match_operand:SI 2 "s_register_operand") + (match_operand:DI 2 "s_register_operand") (match_operand:SI 3 "mve_imm_selective_upto_8")] "TARGET_HAVE_MVE" { @@ -9870,7 +9870,7 @@ (define_expand "mve_vdwdupq_n_u" (define_expand "mve_vdwdupq_wb_u" [(match_operand:SI 0 "s_register_operand") (match_operand:SI 1 "s_register_operand") - (match_operand:SI 2 "s_register_operand") + (match_operand:DI 2 "s_register_operand") (match_operand:SI 3 "mve_imm_selective_upto_8") (unspec:MVE_2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_HAVE_MVE" @@ -9888,16 +9888,16 @@ (define_expand "mve_vdwdupq_wb_u" (define_insn "mve_vdwdupq_wb_u_insn" [(set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:SI 2 "s_register_operand" "1") - (match_operand:SI 3 "s_register_operand" "r") + (subreg:SI (match_operand:DI 3 "s_register_operand" "r") 4) (match_operand:SI 4 "mve_imm_selective_upto_8" "Rg")] VDWDUPQ)) (set (match_operand:SI 1 "s_register_operand" "=e") (unspec:SI [(match_dup 2) - (match_dup 3) + (subreg:SI (match_dup 3) 4) (match_dup 4)] VDWDUPQ))] "TARGET_HAVE_MVE" - "vdwdup.u%#\t%q0, %2, %3, %4" + "vdwdup.u%#\t%q0, %2, %R3, %4" ) ;; @@ -9907,7 +9907,7 @@ (define_expand "mve_vdwdupq_m_n_u" [(match_operand:MVE_2 0 "s_register_operand") (match_operand:MVE_2 1 "s_register_operand") (match_operand:SI 2 "s_register_operand") - (match_operand:SI 3 "s_register_operand") + (match_operand:DI 3 "s_register_operand") (match_operand:SI 4 "mve_imm_selective_upto_8") (match_operand:HI 5 "vpr_register_operand")] "TARGET_HAVE_MVE" @@ -9927,7 +9927,7 @@ (define_expand "mve_vdwdupq_m_wb_u" [(match_operand:SI 0 "s_register_operand") (match_operand:MVE_2 1 "s_register_operand") (match_operand:SI 2 "s_register_operand") - (match_operand:SI 3 "s_register_operand") + (match_operand:DI 3 "s_register_operand") (match_operand:SI 4 "mve_imm_selective_upto_8") (match_operand:HI 5 "vpr_register_operand")] "TARGET_HAVE_MVE" @@ -9945,22 +9945,22 @@ (define_expand "mve_vdwdupq_m_wb_u" ;; (define_insn "mve_vdwdupq_m_wb_u_insn" [(set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 2 "s_register_operand" "w") + (unspec:MVE_2 [(match_operand:MVE_2 2 "s_register_operand" "0") (match_operand:SI 3 "s_register_operand" "1") - (match_operand:SI 4 "s_register_operand" "r") + (subreg:SI (match_operand:DI 4 "s_register_operand" "r") 4) (match_operand:SI 5 "mve_imm_selective_upto_8" "Rg") (match_operand:HI 6 "vpr_register_operand" "Up")] VDWDUPQ_M)) (set (match_operand:SI 1 "s_register_operand" "=e") (unspec:SI [(match_dup 2) (match_dup 3) - (match_dup 4) + (subreg:SI (match_dup 4) 4) (match_dup 5) (match_dup 6)] VDWDUPQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;\tvdwdupt.u%#\t%q2, %3, %4, %5" + "vpst\;\tvdwdupt.u%#\t%q2, %3, %R4, %5" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -9970,7 +9970,7 @@ (define_insn "mve_vdwdupq_m_wb_u_insn" (define_expand "mve_viwdupq_n_u" [(match_operand:MVE_2 0 "s_register_operand") (match_operand:SI 1 "s_register_operand") - (match_operand:SI 2 "s_register_operand") + (match_operand:DI 2 "s_register_operand") (match_operand:SI 3 "mve_imm_selective_upto_8")] "TARGET_HAVE_MVE" { @@ -9987,7 +9987,7 @@ (define_expand "mve_viwdupq_n_u" (define_expand "mve_viwdupq_wb_u" [(match_operand:SI 0 "s_register_operand") (match_operand:SI 1 "s_register_operand") - (match_operand:SI 2 "s_register_operand") + (match_operand:DI 2 "s_register_operand") (match_operand:SI 3 "mve_imm_selective_upto_8") (unspec:MVE_2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_HAVE_MVE" @@ -10005,16 +10005,16 @@ (define_expand "mve_viwdupq_wb_u" (define_insn "mve_viwdupq_wb_u_insn" [(set (match_operand:MVE_2 0 "s_register_operand" "=w") (unspec:MVE_2 [(match_operand:SI 2 "s_register_operand" "1") - (match_operand:SI 3 "s_register_operand" "r") + (subreg:SI (match_operand:DI 3 "s_register_operand" "r") 4) (match_operand:SI 4 "mve_imm_selective_upto_8" "Rg")] VIWDUPQ)) (set (match_operand:SI 1 "s_register_operand" "=e") (unspec:SI [(match_dup 2) - (match_dup 3) + (subreg:SI (match_dup 3) 4) (match_dup 4)] VIWDUPQ))] "TARGET_HAVE_MVE" - "viwdup.u%#\t%q0, %2, %3, %4" + "viwdup.u%#\t%q0, %2, %R3, %4" ) ;; @@ -10024,7 +10024,7 @@ (define_expand "mve_viwdupq_m_n_u" [(match_operand:MVE_2 0 "s_register_operand") (match_operand:MVE_2 1 "s_register_operand") (match_operand:SI 2 "s_register_operand") - (match_operand:SI 3 "s_register_operand") + (match_operand:DI 3 "s_register_operand") (match_operand:SI 4 "mve_imm_selective_upto_8") (match_operand:HI 5 "vpr_register_operand")] "TARGET_HAVE_MVE" @@ -10044,7 +10044,7 @@ (define_expand "mve_viwdupq_m_wb_u" [(match_operand:SI 0 "s_register_operand") (match_operand:MVE_2 1 "s_register_operand") (match_operand:SI 2 "s_register_operand") - (match_operand:SI 3 "s_register_operand") + (match_operand:DI 3 "s_register_operand") (match_operand:SI 4 "mve_imm_selective_upto_8") (match_operand:HI 5 "vpr_register_operand")] "TARGET_HAVE_MVE" @@ -10062,24 +10062,25 @@ (define_expand "mve_viwdupq_m_wb_u" ;; (define_insn "mve_viwdupq_m_wb_u_insn" [(set (match_operand:MVE_2 0 "s_register_operand" "=w") - (unspec:MVE_2 [(match_operand:MVE_2 2 "s_register_operand" "w") + (unspec:MVE_2 [(match_operand:MVE_2 2 "s_register_operand" "0") (match_operand:SI 3 "s_register_operand" "1") - (match_operand:SI 4 "s_register_operand" "r") + (subreg:SI (match_operand:DI 4 "s_register_operand" "r") 4) (match_operand:SI 5 "mve_imm_selective_upto_8" "Rg") (match_operand:HI 6 "vpr_register_operand" "Up")] VIWDUPQ_M)) (set (match_operand:SI 1 "s_register_operand" "=e") (unspec:SI [(match_dup 2) (match_dup 3) - (match_dup 4) + (subreg:SI (match_dup 4) 4) (match_dup 5) (match_dup 6)] VIWDUPQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;\tviwdupt.u%#\t%q2, %3, %4, %5" + "vpst\;\tviwdupt.u%#\t%q2, %3, %R4, %5" [(set_attr "type" "mve_move") (set_attr "length""8")]) + (define_expand "mve_vstrwq_scatter_base_wb_v4si" [(match_operand:V4SI 0 "s_register_operand" "=w") (match_operand:SI 1 "mve_vldrd_immediate" "Ri")