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From: "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com>
To: gcc-patches@gcc.gnu.org
Cc: Richard Biener <rguenther@suse.de>
Subject: [PATCH 4/8] vect: don't allow fully masked loops with non-masked simd clones [PR 110485]
Date: Wed, 30 Aug 2023 10:11:55 +0100	[thread overview]
Message-ID: <49eca251-630e-b26c-5d66-4f8b322ee801@arm.com> (raw)
In-Reply-To: <73b53052-c3a4-4028-2836-ade419431eda@arm.com>

[-- Attachment #1: Type: text/plain, Size: 637 bytes --]

When analyzing a loop and choosing a simdclone to use it is possible to 
choose a simdclone that cannot be used 'inbranch' for a loop that can 
use partial vectors.  This may lead to the vectorizer deciding to use 
partial vectors which are not supported for notinbranch simd clones. 
This patch fixes that by disabling the use of partial vectors once a 
notinbranch simd clone has been selected.

gcc/ChangeLog:

	PR tree-optimization/110485
	* tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
	vectors usage if a notinbranch simdclone has been selected.

gcc/testsuite/ChangeLog:

	* gcc.dg/gomp/pr110485.c: New test.

[-- Attachment #2: sve_simd_clones_4.patch --]
[-- Type: text/plain, Size: 1925 bytes --]

diff --git a/gcc/testsuite/gcc.dg/gomp/pr110485.c b/gcc/testsuite/gcc.dg/gomp/pr110485.c
new file mode 100644
index 0000000000000000000000000000000000000000..ba6817a127f40246071e32ccebf692cc4d121d15
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/gomp/pr110485.c
@@ -0,0 +1,19 @@
+/* PR 110485 */
+/* { dg-do compile } */
+/* { dg-additional-options "-Ofast -fdump-tree-vect-details" } */
+/* { dg-additional-options "-march=znver4 --param=vect-partial-vector-usage=1" { target x86_64-*-* } } */
+#pragma omp declare simd notinbranch uniform(p)
+extern double __attribute__ ((const)) bar (double a, double p);
+
+double a[1024];
+double b[1024];
+
+void foo (int n)
+{
+  #pragma omp simd
+  for (int i = 0; i < n; ++i)
+    a[i] = bar (b[i], 71.2);
+}
+
+/* { dg-final { scan-tree-dump-not "MASK_LOAD" "vect" } } */
+/* { dg-final { scan-tree-dump "can't use a fully-masked loop because a non-masked simd clone was selected." "vect" { target x86_64-*-* } } } */
diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index 35207de7acb410358220dbe8d1af82215b5091bf..664c3b5f7ca48fdb49383fb8a97f407465574479 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -4349,6 +4349,17 @@ vectorizable_simd_clone_call (vec_info *vinfo, stmt_vec_info stmt_info,
 		       ? boolean_true_node : boolean_false_node;
 	    STMT_VINFO_SIMD_CLONE_INFO (stmt_info).safe_push (sll);
 	  }
+
+      if (!bestn->simdclone->inbranch)
+	{
+	  if (dump_enabled_p ()
+	      && LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P (loop_vinfo))
+	    dump_printf_loc (MSG_NOTE, vect_location,
+			     "can't use a fully-masked loop because a"
+			     " non-masked simd clone was selected.\n");
+	  LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P (loop_vinfo) = false;
+	}
+
       STMT_VINFO_TYPE (stmt_info) = call_simd_clone_vec_info_type;
       DUMP_VECT_SCOPE ("vectorizable_simd_clone_call");
 /*      vect_model_simple_cost (vinfo, stmt_info, ncopies,

  parent reply	other threads:[~2023-08-30  9:12 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-30  8:49 aarch64, vect, omp: Add SVE support for simd clones [PR 96342] Andre Vieira (lists)
2023-08-30  9:06 ` [PATCH 1/8] parloops: Copy target and optimizations when creating a function clone Andre Vieira (lists)
2023-08-30 12:31   ` Richard Biener
2023-10-18 14:40     ` Andre Vieira (lists)
2023-08-30  9:08 ` [Patch 2/8] parloops: Allow poly nit and bound Andre Vieira (lists)
2023-08-30 12:32   ` Richard Biener
2023-10-18 14:40     ` Andre Vieira (lists)
2023-08-30  9:10 ` [Patch 3/8] vect: Fix vect_get_smallest_scalar_type for simd clones Andre Vieira (lists)
2023-08-30 12:54   ` Richard Biener
2023-10-18 14:40     ` Andre Vieira (lists)
2023-10-19 12:07       ` Richard Biener
2023-08-30  9:11 ` Andre Vieira (lists) [this message]
2023-08-30 12:54   ` [PATCH 4/8] vect: don't allow fully masked loops with non-masked simd clones [PR 110485] Richard Biener
2023-10-18 14:40     ` Andre Vieira (lists)
2023-10-19 12:06       ` Richard Biener
2023-08-30  9:13 ` [PATCH 5/8] vect: Use inbranch simdclones in masked loops Andre Vieira (lists)
2023-10-18 14:41   ` Andre Vieira (lists)
2023-10-19 12:17     ` Richard Biener
2023-08-30  9:14 ` [PATCH 6/8] vect: Add vector_mode paramater to simd_clone_usable Andre Vieira (lists)
2023-08-30  9:17   ` Andre Vieira (lists)
2023-08-30 13:01   ` Richard Biener
2023-08-30 15:02     ` Andre Vieira (lists)
2023-08-31  6:39       ` Richard Biener
2023-09-28 15:57         ` Andre Vieira (lists)
2023-08-30  9:17 ` [PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM Andre Vieira (lists)
2023-08-30 13:04   ` Richard Biener
2023-10-04 10:32     ` Andre Vieira (lists)
2023-10-04 10:41       ` Richard Biener
2023-10-04 12:40         ` Andre Vieira (lists)
2023-10-18 14:41           ` [PATCH6/8] omp: Reorder call for TARGET_SIMD_CLONE_ADJUST (was Re: [PATCH7/8] vect: Add TARGET_SIMD_CLONE_ADJUST_RET_OR_PARAM) Andre Vieira (lists)
2023-10-30 18:34             ` Andre Vieira (lists)
2023-10-31  7:59             ` Richard Biener
2023-12-08 10:35               ` Jakub Jelinek
2023-08-30  9:19 ` [PATCH 8/8] aarch64: Add SVE support for simd clones [PR 96342] Andre Vieira (lists)
2023-10-18 14:41   ` Andre Vieira (lists)
2023-11-29 17:01     ` Richard Sandiford
2023-12-01 16:39       ` Andre Vieira (lists)
2023-10-18 14:40 ` aarch64, vect, omp: " Andre Vieira (lists)
2023-10-18 14:41 ` [PATCH 0/8] omp: Replace simd_clone_subparts with TYPE_VECTOR_SUBPARTS Andre Vieira (lists)
2023-10-19  7:10   ` Richard Biener

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