Re: RFA: Add support for Renesas RX architecture to GCC (take 3)

[Richard Henderson <rth@redhat.com>]

> (define_insn "revl"
>   [(set (match_operand:SI           0 "register_operand" "=r")
>         (bswap:SI (match_operand:SI 1 "register_operand"  "r")))]
>   ""
>   "revl\t%1, %0"
>   [(set_attr "length" "3")]

bswapsi2

As a follow-up, consider defining bswaphi2 with revw.

> ;; Note - the zero_extends are to distinguish this pattern from the
> ;; mulsidi3 pattern.  Immediate mode addressing is not supported
> ;; because gcc cannot handle the expression: (zero_extend (const_int)).
> (define_insn "umulsidi3"

FWIW, gcc isn't supposed to handle the express (sign_extend (const_int))
either.  I think the best way to handle this is to define two separate
patterns

   (set (match_operand:DI 0)
        (mult:DI (zero_extend:DI (match_operand:SI 1)
		(match_operand:DI 2 "const_int_with_range_constraint")))

and similar for mulsidi3.  You can leave this for a follow-on patch.

> (define_insn "addsf3"
>   [(set (match_operand:SF          0 "register_operand"  "=r,r,r")
>         (plus:SF (match_operand:SF 1 "register_operand"  "%0,0,0")
>                  (match_operand:SF 2 "rx_source_operand"  "r,F,Q")))]
>   "fast_math_flags_set_p ()"

All instances of fast_math_flags_set_p should be testing the single flag
flag_unsafe_math_optimizations.  I also highly recommend that you put
this in a macro in rx.h, because as I said before, the proper thing to
test would be a new flag_normal_math_only that specifies that subnormal
math is not needed.

> mieee
> Target Mask(64BIT_DOUBLES) MaskExists
> Conform to the IEEE754 standard for floating point arithmetic.

This can be removed.

>                   warning (0, "no fixed registers available "
> "for use by fast interrupt handler");

Indent the second line properly.

Ok with those changes.


r~