[PATCH, i386]: Fix annoying "i386.md: operand 1 missing mode" warnings

[PATCH, i386]: Fix annoying "i386.md: operand 1 missing mode" warnings

[Uros Bizjak]

[-- Attachment #1: Type: text/plain, Size: 2062 bytes --]

Hello!

Attached patch fixes these warings by treating
ix86_carry_flag_operator predicate as - well - operator, using
match_operator instead of match_operand. The problematic part of the
switch is in funny way how operators are expanded; the mode of
operator as well as the mode of its operands are not passed through
expander, but is generated form expander template.

The fix is to introduce another operand that expands FLAGS_REG to
requested mode. Following this change, we can remove
ix86_carry_flag_operator mode matching from insn  patterns, so we can
in theory add/sub carry flag that was produced using arithmetic
operation in different mode.

2009-11-23  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (add<mode>3_carry): New expander.
	(sub<mode>3_carry): Ditto.
	(x86_mov<mode>cc_0_m1): Ditto.
	(*add<mode>3_carry): Make private. Use VOIDmode match_operator for
	ix86_carry_flag_operator operator predicate.
	(*sub<mode>3_carry): Ditto.
	(*x86_mov<mode>cc_0_m1): Ditto.
	(*addsi3_carry_zext): Use VOIDmode match_operator for
	ix86_carry_flag_operator operator predicate.
	(*subsi3_carry_zext): Ditto.
	(*x86_mov<mode>cc_0_m1_s): Ditto.
	(*x86_mov<mode>cc_0_m1_neg): Ditto.
	* config/i386/predocates.md (ix86_carry_flag_operator): Do not
	check op sub-expressions for FLAGS_REG and const0_rtx.
	* config/i386/i386.c (*ix86_gen_sub3_carry): Update prototype.
	(ix86_expand_int_movcc): Update calls to gen_x86_mov{si,di}cc_0_m1.
	(ix86_expand_int_addcc): Update calls to
	gen_{add,sub}{qi,hi,si,di}3_carry.  Do not set mode of compare_op.
	(ix86_expand_strlensi_unroll_1): Update calls to ix86_gen_sub3_carry.
	Do not set mode of compare operation.

The patch was bootstrapped on x86_64-pc-linux-gnu, regression test
with {,-m32} is in progress. Since 32bit x86 machines are not
available in compile farm anymore, I would ask someone to bootstrap
and regtest this patch on a 32bit x86 target.

BTW: There remains one unrelated "missing mode" warning in AVX
pattern. Oh, and the patch includes the fix for recent x86 bootstrap
breakage.

Uros.

[-- Attachment #2: p.diff.txt --]
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Index: i386.md
===================================================================
--- i386.md	(revision 154433)
+++ i386.md	(working copy)
@@ -5915,10 +5915,24 @@
 	      (clobber (reg:CC FLAGS_REG))])]
   "split_<dwi> (&operands[0], 3, &operands[0], &operands[3]);")
 
-(define_insn "add<mode>3_carry"
+(define_expand "add<mode>3_carry"
+  [(parallel
+    [(set (match_operand:SWI 0 "nonimmediate_operand" "")
+	  (plus:SWI
+	    (plus:SWI (match_operator:SWI 4 "ix86_carry_flag_operator"
+		       [(match_operand 3 "flags_reg_operand" "")
+			(const_int 0)])
+		      (match_operand:SWI 1 "nonimmediate_operand" ""))
+	    (match_operand:SWI 2 "<general_operand>" "")))
+     (clobber (reg:CC FLAGS_REG))])]
+  "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
+  "")
+
+(define_insn "*add<mode>3_carry"
   [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	(plus:SWI
-	  (plus:SWI (match_operand:SWI 3 "ix86_carry_flag_operator" "")
+	  (plus:SWI (match_operator 3 "ix86_carry_flag_operator"
+		     [(reg FLAGS_REG) (const_int 0)])
 		    (match_operand:SWI 1 "nonimmediate_operand" "%0,0"))
 	  (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
    (clobber (reg:CC FLAGS_REG))]
@@ -5933,7 +5947,8 @@
   [(set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI
 	  (plus:SI
-	    (plus:SI (match_operand:SI 3 "ix86_carry_flag_operator" "")
+	    (plus:SI (match_operator 3 "ix86_carry_flag_operator"
+		      [(reg FLAGS_REG) (const_int 0)])
 		     (match_operand:SI 1 "nonimmediate_operand" "%0"))
 	  (match_operand:SI 2 "general_operand" "g"))))
    (clobber (reg:CC FLAGS_REG))]
@@ -7440,12 +7455,27 @@
 	      (clobber (reg:CC FLAGS_REG))])]
   "split_<dwi> (&operands[0], 3, &operands[0], &operands[3]);")
 
-(define_insn "sub<mode>3_carry"
+(define_expand "sub<mode>3_carry"
+  [(parallel
+    [(set (match_operand:SWI 0 "nonimmediate_operand" "")
+	    (minus:SWI
+	      (match_operand:SWI 1 "nonimmediate_operand" "")
+	      (plus:SWI
+		(match_operator:SWI 4 "ix86_carry_flag_operator"
+		 [(match_operand 3 "flags_reg_operand" "")
+		  (const_int 0)])
+		(match_operand:SWI 2 "<general_operand>" ""))))
+     (clobber (reg:CC FLAGS_REG))])]
+  "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
+  "")
+
+(define_insn "*sub<mode>3_carry"
   [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	  (minus:SWI
 	    (match_operand:SWI 1 "nonimmediate_operand" "0,0")
 	    (plus:SWI
-	      (match_operand:SWI 3 "ix86_carry_flag_operator" "")
+	      (match_operator 3 "ix86_carry_flag_operator"
+	       [(reg FLAGS_REG) (const_int 0)])
 	      (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
@@ -7459,7 +7489,8 @@
   [(set (match_operand:DI 0 "register_operand" "=r")
 	  (zero_extend:DI
 	    (minus:SI (match_operand:SI 1 "register_operand" "0")
-	      (plus:SI (match_operand:SI 3 "ix86_carry_flag_operator" "")
+	      (plus:SI (match_operator 3 "ix86_carry_flag_operator"
+			[(reg FLAGS_REG) (const_int 0)])
 		 (match_operand:SI 2 "general_operand" "g")))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
@@ -19277,9 +19308,23 @@
 ;; the register first winds up with `sbbl $0,reg', which is also weird.
 ;; So just document what we're doing explicitly.
 
-(define_insn "x86_mov<mode>cc_0_m1"
+(define_expand "x86_mov<mode>cc_0_m1"
+  [(parallel
+    [(set (match_operand:SWI48 0 "register_operand" "")
+	  (if_then_else:SWI48
+	    (match_operator:SWI48 2 "ix86_carry_flag_operator"
+	     [(match_operand 1 "flags_reg_operand" "")
+	      (const_int 0)])
+	    (const_int -1)
+	    (const_int 0)))
+     (clobber (reg:CC FLAGS_REG))])]
+  ""
+  "")
+
+(define_insn "*x86_mov<mode>cc_0_m1"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
-	(if_then_else:SWI48 (match_operand 1 "ix86_carry_flag_operator" "")
+	(if_then_else:SWI48 (match_operator 1 "ix86_carry_flag_operator"
+			     [(reg FLAGS_REG) (const_int 0)])
 	  (const_int -1)
 	  (const_int 0)))
    (clobber (reg:CC FLAGS_REG))]
@@ -19297,7 +19342,8 @@
 
 (define_insn "*x86_mov<mode>cc_0_m1_se"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
-	(sign_extract:SWI48 (match_operand 1 "ix86_carry_flag_operator" "")
+	(sign_extract:SWI48 (match_operator 1 "ix86_carry_flag_operator"
+			     [(reg FLAGS_REG) (const_int 0)])
 			    (const_int 1)
 			    (const_int 0)))
    (clobber (reg:CC FLAGS_REG))]
@@ -19313,7 +19359,8 @@
 
 (define_insn "*x86_mov<mode>cc_0_m1_neg"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
-	(neg:SWI48 (match_operand 1 "ix86_carry_flag_operator" "")))]
+	(neg:SWI48 (match_operator 1 "ix86_carry_flag_operator"
+		    [(reg FLAGS_REG) (const_int 0)])))]
   ""
   "sbb{<imodesuffix>}\t%0, %0"
   [(set_attr "type" "alu")
Index: predicates.md
===================================================================
--- predicates.md	(revision 154433)
+++ predicates.md	(working copy)
@@ -1056,11 +1056,6 @@
   enum machine_mode inmode = GET_MODE (XEXP (op, 0));
   enum rtx_code code = GET_CODE (op);
 
-  if (!REG_P (XEXP (op, 0))
-      || REGNO (XEXP (op, 0)) != FLAGS_REG
-      || XEXP (op, 1) != const0_rtx)
-    return 0;
-
   if (inmode == CCFPmode || inmode == CCFPUmode)
     {
       if (!ix86_trivial_fp_comparison_operator (op, mode))
Index: i386.c
===================================================================
--- i386.c	(revision 154433)
+++ i386.c	(working copy)
@@ -1808,7 +1808,7 @@ static rtx (*ix86_gen_leave) (void);
 static rtx (*ix86_gen_pop1) (rtx);
 static rtx (*ix86_gen_add3) (rtx, rtx, rtx);
 static rtx (*ix86_gen_sub3) (rtx, rtx, rtx);
-static rtx (*ix86_gen_sub3_carry) (rtx, rtx, rtx, rtx);
+static rtx (*ix86_gen_sub3_carry) (rtx, rtx, rtx, rtx, rtx);
 static rtx (*ix86_gen_one_cmpl2) (rtx, rtx);
 static rtx (*ix86_gen_monitor) (rtx, rtx, rtx);
 static rtx (*ix86_gen_andsp) (rtx, rtx, rtx);
@@ -15404,15 +15404,20 @@ ix86_expand_int_movcc (rtx operands[])
 
           if (!sign_bit_compare_p)
 	    {
+	      rtx flags;
+	      rtx (*insn)(rtx, rtx, rtx);
 	      bool fpcmp = false;
 
 	      compare_code = GET_CODE (compare_op);
 
-	      if (GET_MODE (XEXP (compare_op, 0)) == CCFPmode
-		  || GET_MODE (XEXP (compare_op, 0)) == CCFPUmode)
+	      flags = XEXP (compare_op, 0);
+
+	      if (GET_MODE (flags) == CCFPmode
+		  || GET_MODE (flags) == CCFPUmode)
 		{
 		  fpcmp = true;
-		  compare_code = ix86_fp_compare_code_to_integer (compare_code);
+		  compare_code
+		    = ix86_fp_compare_code_to_integer (compare_code);
 		}
 
 	      /* To simplify rest of code, restrict to the GEU case.  */
@@ -15431,7 +15436,8 @@ ix86_expand_int_movcc (rtx operands[])
 			      reverse_condition_maybe_unordered
 			        (GET_CODE (compare_op)));
 		  else
-		    PUT_CODE (compare_op, reverse_condition (GET_CODE (compare_op)));
+		    PUT_CODE (compare_op,
+			      reverse_condition (GET_CODE (compare_op)));
 		}
 	      diff = ct - cf;
 
@@ -15440,10 +15446,11 @@ ix86_expand_int_movcc (rtx operands[])
 		tmp = gen_reg_rtx (mode);
 
 	      if (mode == DImode)
-		emit_insn (gen_x86_movdicc_0_m1 (tmp, compare_op));
+		insn = gen_x86_movdicc_0_m1;
 	      else
-		emit_insn (gen_x86_movsicc_0_m1 (gen_lowpart (SImode, tmp),
-						 compare_op));
+		insn = gen_x86_movsicc_0_m1;
+
+	      emit_insn (insn (tmp, flags, compare_op));
 	    }
 	  else
 	    {
@@ -16377,11 +16384,12 @@ int
 ix86_expand_int_addcc (rtx operands[])
 {
   enum rtx_code code = GET_CODE (operands[1]);
-  rtx (*insn)(rtx, rtx, rtx, rtx);
+  rtx flags;
+  rtx (*insn)(rtx, rtx, rtx, rtx, rtx);
   rtx compare_op;
   rtx val = const0_rtx;
   bool fpcmp = false;
-  enum machine_mode mode = GET_MODE (operands[0]);
+  enum machine_mode mode;
 
   ix86_compare_op0 = XEXP (operands[1], 0);
   ix86_compare_op1 = XEXP (operands[1], 1);
@@ -16393,8 +16401,10 @@ ix86_expand_int_addcc (rtx operands[])
      return 0;
   code = GET_CODE (compare_op);
 
-  if (GET_MODE (XEXP (compare_op, 0)) == CCFPmode
-      || GET_MODE (XEXP (compare_op, 0)) == CCFPUmode)
+  flags = XEXP (compare_op, 0);
+
+  if (GET_MODE (flags) == CCFPmode
+      || GET_MODE (flags) == CCFPUmode)
     {
       fpcmp = true;
       code = ix86_fp_compare_code_to_integer (code);
@@ -16410,12 +16420,13 @@ ix86_expand_int_addcc (rtx operands[])
       else
 	PUT_CODE (compare_op, reverse_condition (GET_CODE (compare_op)));
     }
-  PUT_MODE (compare_op, mode);
+
+  mode = GET_MODE (operands[0]);
 
   /* Construct either adc or sbb insn.  */
   if ((code == LTU) == (operands[3] == constm1_rtx))
     {
-      switch (GET_MODE (operands[0]))
+      switch (mode)
 	{
 	  case QImode:
 	    insn = gen_subqi3_carry;
@@ -16435,7 +16446,7 @@ ix86_expand_int_addcc (rtx operands[])
     }
   else
     {
-      switch (GET_MODE (operands[0]))
+      switch (mode)
 	{
 	  case QImode:
 	    insn = gen_addqi3_carry;
@@ -16453,7 +16464,7 @@ ix86_expand_int_addcc (rtx operands[])
 	    gcc_unreachable ();
 	}
     }
-  emit_insn (insn (operands[0], operands[2], val, compare_op));
+  emit_insn (insn (operands[0], operands[2], val, flags, compare_op));
 
   return 1; /* DONE */
 }
@@ -18986,7 +18997,6 @@ ix86_expand_strlensi_unroll_1 (rtx out, 
 			       gen_rtx_IF_THEN_ELSE (Pmode, tmp,
 						     reg2,
 						     out)));
-
     }
   else
     {
@@ -19013,8 +19023,9 @@ ix86_expand_strlensi_unroll_1 (rtx out, 
   /* Avoid branch in fixing the byte.  */
   tmpreg = gen_lowpart (QImode, tmpreg);
   emit_insn (gen_addqi3_cc (tmpreg, tmpreg, tmpreg));
-  cmp = gen_rtx_LTU (Pmode, gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
-  emit_insn ((*ix86_gen_sub3_carry) (out, out, GEN_INT (3), cmp));
+  tmp = gen_rtx_REG (CCmode, FLAGS_REG);
+  cmp = gen_rtx_LTU (VOIDmode, tmp, const0_rtx);
+  emit_insn ((*ix86_gen_sub3_carry) (out, out, GEN_INT (3), tmp, cmp));
 
   emit_label (end_0_label);
 }
@@ -24535,7 +24546,7 @@ ix86_builtin_reciprocal (unsigned int fn
 int
 avx_vpermilp_parallel (rtx par, enum machine_mode mode)
 {
-  unsigned i, nelt = GET_MODE_NUNITS (mode);
+  int i, nelt = GET_MODE_NUNITS (mode);
   unsigned mask = 0;
   unsigned char ipar[8];
 
@@ -24548,7 +24559,7 @@ avx_vpermilp_parallel (rtx par, enum mac
   for (i = 0; i < nelt; ++i)
     {
       rtx er = XVECEXP (par, 0, i);
-      unsigned HOST_WIDE_INT ei;
+      HOST_WIDE_INT ei;
 
       if (!CONST_INT_P (er))
 	return 0;

Re: [PATCH, i386]: Fix annoying "i386.md: operand 1 missing mode" warnings

[H.J. Lu]

On Mon, Nov 23, 2009 at 4:51 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> The patch was bootstrapped on x86_64-pc-linux-gnu, regression test
> with {,-m32} is in progress. Since 32bit x86 machines are not
> available in compile farm anymore, I would ask someone to bootstrap
> and regtest this patch on a 32bit x86 target.
>

On trunk, you can bootstrap i386-linux target on Linux/x86-64 with:

CC="gcc -m32" CXX="g++ -m32" gcc_cv_as_ix86_gotoff_in_data=yes ...../configure \
                --enable-clocale=gnu --with-system-zlib --enable-shared --with-d
emangler-in-ld i686-linux --enable-tls

I had to use gcc_cv_as_ix86_gotoff_in_data=yes and --enable-tls since
gcc assembler test doesn't pass --32 to assembler. It would nice to fix
it.

Of course, you have to install all necessary 32bit libraries.



-- 
H.J.

Re: [PATCH, i386]: Fix annoying "i386.md: operand 1 missing mode" warnings

[Jakub Jelinek]

On Mon, Nov 23, 2009 at 01:51:26PM +0100, Uros Bizjak wrote:
> @@ -24535,7 +24546,7 @@ ix86_builtin_reciprocal (unsigned int fn
>  int
>  avx_vpermilp_parallel (rtx par, enum machine_mode mode)
>  {
> -  unsigned i, nelt = GET_MODE_NUNITS (mode);
> +  int i, nelt = GET_MODE_NUNITS (mode);
>    unsigned mask = 0;
>    unsigned char ipar[8];
>  
> @@ -24548,7 +24559,7 @@ avx_vpermilp_parallel (rtx par, enum mac
>    for (i = 0; i < nelt; ++i)
>      {
>        rtx er = XVECEXP (par, 0, i);
> -      unsigned HOST_WIDE_INT ei;
> +      HOST_WIDE_INT ei;
>  
>        if (!CONST_INT_P (er))
>  	return 0;

Won't this consider negative constants as valid?
I'd say
--- config/i386/i386.c	(revision 154447)
+++ config/i386/i386.c	(working copy)
@@ -24539,7 +24539,7 @@ avx_vpermilp_parallel (rtx par, enum mac
   unsigned mask = 0;
   unsigned char ipar[8];
 
-  if (XVECLEN (par, 0) != nelt)
+  if ((unsigned int) XVECLEN (par, 0) != nelt)
     return 0;
 
   /* Validate that all of the elements are constants, and not totally

would be shorter and better, given that negative number of elements
doesn't make any sense.

	Jakub

Re: [PATCH, i386]: Fix annoying "i386.md: operand 1 missing mode" warnings

[Uros Bizjak]

On 11/23/2009 04:46 PM, Jakub Jelinek wrote:
> On Mon, Nov 23, 2009 at 01:51:26PM +0100, Uros Bizjak wrote:
>    
>> @@ -24535,7 +24546,7 @@ ix86_builtin_reciprocal (unsigned int fn
>>   int
>>   avx_vpermilp_parallel (rtx par, enum machine_mode mode)
>>   {
>> -  unsigned i, nelt = GET_MODE_NUNITS (mode);
>> +  int i, nelt = GET_MODE_NUNITS (mode);
>>     unsigned mask = 0;
>>     unsigned char ipar[8];
>>
>> @@ -24548,7 +24559,7 @@ avx_vpermilp_parallel (rtx par, enum mac
>>     for (i = 0; i<  nelt; ++i)
>>       {
>>         rtx er = XVECEXP (par, 0, i);
>> -      unsigned HOST_WIDE_INT ei;
>> +      HOST_WIDE_INT ei;
>>
>>         if (!CONST_INT_P (er))
>>   	return 0;
>>      
> Won't this consider negative constants as valid?
> I'd say
> --- config/i386/i386.c	(revision 154447)
> +++ config/i386/i386.c	(working copy)
> @@ -24539,7 +24539,7 @@ avx_vpermilp_parallel (rtx par, enum mac
>     unsigned mask = 0;
>     unsigned char ipar[8];
>
> -  if (XVECLEN (par, 0) != nelt)
> +  if ((unsigned int) XVECLEN (par, 0) != nelt)
>       return 0;
>
>     /* Validate that all of the elements are constants, and not totally
>
> would be shorter and better, given that negative number of elements
> doesn't make any sense.
>    

This part was included from [1] just to fix the bootstrap. I don't 
consider this part relevant to the core of the patch and it isn't 
intended for commit.

[1] http://gcc.gnu.org/ml/gcc-patches/2009-11/msg01222.html

Uros.

Re: [PATCH, i386]: Fix annoying "i386.md: operand 1 missing mode" warnings

[H.J. Lu]

On Mon, Nov 23, 2009 at 5:12 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Mon, Nov 23, 2009 at 4:51 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
>> The patch was bootstrapped on x86_64-pc-linux-gnu, regression test
>> with {,-m32} is in progress. Since 32bit x86 machines are not
>> available in compile farm anymore, I would ask someone to bootstrap
>> and regtest this patch on a 32bit x86 target.
>>
>
> On trunk, you can bootstrap i386-linux target on Linux/x86-64 with:
>
> CC="gcc -m32" CXX="g++ -m32" gcc_cv_as_ix86_gotoff_in_data=yes ...../configure \
>                --enable-clocale=gnu --with-system-zlib --enable-shared --with-d
> emangler-in-ld i686-linux --enable-tls
>
> I had to use gcc_cv_as_ix86_gotoff_in_data=yes and --enable-tls since
> gcc assembler test doesn't pass --32 to assembler. It would nice to fix
> it.
>
> Of course, you have to install all necessary 32bit libraries.
>
>
>
> --
> H.J.
>

I got those extra failures for i686-linux target

FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O1
FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O2
FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O2 -flto
FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O2 -fwhopr
FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O3 -fomit-frame-pointer
FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O3
-fomit-frame-pointer -funroll-all-loops -finline-functions
FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O3
-fomit-frame-pointer -funroll-loops
FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O3 -g
FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -Os

against revision 154423.

-- 
H.J.

Re: [PATCH, i386]: Fix annoying "i386.md: operand 1 missing mode" warnings

[Uros Bizjak]

On 11/23/2009 11:49 PM, H.J. Lu wrote:

>>> The patch was bootstrapped on x86_64-pc-linux-gnu, regression test
>>> with {,-m32} is in progress. Since 32bit x86 machines are not
>>> available in compile farm anymore, I would ask someone to bootstrap
>>> and regtest this patch on a 32bit x86 target.
> I got those extra failures for i686-linux target
>
> FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O1
> FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O2
> FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O2 -flto
> FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O2 -fwhopr
> FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O3 -fomit-frame-pointer
> FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O3
> -fomit-frame-pointer -funroll-all-loops -finline-functions
> FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O3
> -fomit-frame-pointer -funroll-loops
> FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -O3 -g
> FAIL: gcc.c-torture/execute/va-arg-22.c execution,  -Os
>
> against revision 154423.
>    

These are not from my patch, see i.e. [1].

I think that the patch was tested as much as possible, I will commit it 
to SVN mainline.

Thanks,
Uros.

[1] http://gcc.gnu.org/ml/gcc-testresults/2009-11/msg02262.html

Re: [PATCH, i386]: Fix annoying "i386.md: operand 1 missing mode" warnings

[Uros Bizjak]

H.J.,

can you perhaps look at one remaining warning:

../../gcc-svn/trunk/gcc/config/i386/sse.md:12034: warning: operand 1 
missing mode?

This warning points to:

(define_insn "*avx_vzeroall"
   [(match_parallel 0 "vzeroall_operation"
     [(unspec_volatile [(const_int 0)] UNSPECV_VZEROALL)
      (set (match_operand 1 "register_operand" "=x")
           (match_operand 2 "const0_operand" "X"))])]
   "TARGET_AVX"
   "vzeroall"
   [(set_attr "type" "sse")
    (set_attr "modrm" "0")
    (set_attr "memory" "none")
    (set_attr "prefix" "vex")
    (set_attr "mode" "OI")])

Thanks,
Uros.