* [PATCH, i386]: Further macroization of insn patterns
@ 2009-11-24 20:53 Uros Bizjak
0 siblings, 0 replies; only message in thread
From: Uros Bizjak @ 2009-11-24 20:53 UTC (permalink / raw)
To: GCC Patches
[-- Attachment #1: Type: text/plain, Size: 2064 bytes --]
Hello!
Attached patch further macroizes i386 patterns: add and sub carry
consuming patterns, negation and one's complement patterns.
Perhaps the most interesting part of otherwise boring mechanical patch
is the reversion of commutative operands in add<mode>3_carry family of
patterns. This cosmetic change was done to better match these patterns
with sub<mode>3_carry patterns, so we can macroize them using plusminus
code iterator.
2009-11-24 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (plusminus_carry_mnemonic): New code attribute.
(add<mode>3_carry): Change operand order of plus RTX.
(*add<mode>3_carry): Ditto.
(*addsi3_carry_zext): Ditto.
(*add<dwi>3_doubleword): Update for changed operand order.
(*negti2_1 splitter): Ditto.
(*negdi2_1 splitter): Ditto.
(<plusminus_insn><mode>3_carry): Macroize expander from
{add,sub}<mode>3_carry patterns using plusminus code iterator.
(*<plusminus_insn><mode>3_carry): Macroize insn from
*{add,sub}<mode>3_carry patetrns using plusminus code iterator.
(neg<mode>2): Macroize expander from neg{qi,hi,si,di,ti}2
patterns using SDWIM mode iterator.
(*neg<dwi>2_doubleword): New insn_and_split pattern. Macroize
pattern from *neg{di,ti}2_1 patterns and corresponding splitters
using DWIH mode iterator.
(*neg<mode>2_1): Macroize insn from neg{qi,hi,si,di}2_1 patterns
using SWI mode iterator.
(*neg<mode>2_cmpz): Ditto from neg{qi,hi,si,di}2_cmpz patterns.
(one_cmpl<mode>2): Macroize expander from one_cmpl{qi,hi,si,di}2
patterns using SWIM mode iterator.
(*one_cmpl<mode>2_1): Macroize insn from one_cmpl{hi,si,di}2_1
patterns using SWI248 mode iterator.
(*one_cmpl<mode>2_2): Macroize insn from one_cmpl{qi,hi,si,di}2_2
patterns using SWI mode iterator.
(*one_cmpl<mode>2_2 splitter): Macroize splitter from
one_cmpl{qi,hi,si,di}2_2 splitter patterns using SWI mode iterator.
Patch was bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32}.
Uros.
[-- Attachment #2: p.diff.txt --]
[-- Type: text/plain, Size: 25707 bytes --]
Index: i386.md
===================================================================
--- i386.md (revision 154492)
+++ i386.md (working copy)
@@ -696,6 +696,8 @@
(define_code_attr plusminus_mnemonic
[(plus "add") (ss_plus "adds") (us_plus "addus")
(minus "sub") (ss_minus "subs") (us_minus "subus")])
+(define_code_attr plusminus_carry_mnemonic
+ [(plus "adc") (minus "sbb")])
;; Mark commutative operators as such in constraints.
(define_code_attr comm [(plus "%") (ss_plus "%") (us_plus "%")
@@ -5908,57 +5910,13 @@
(plus:DWIH (match_dup 1) (match_dup 2)))])
(parallel [(set (match_dup 3)
(plus:DWIH
+ (match_dup 4)
(plus:DWIH
(ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
- (match_dup 4))
- (match_dup 5)))
+ (match_dup 5))))
(clobber (reg:CC FLAGS_REG))])]
"split_<dwi> (&operands[0], 3, &operands[0], &operands[3]);")
-(define_expand "add<mode>3_carry"
- [(parallel
- [(set (match_operand:SWI 0 "nonimmediate_operand" "")
- (plus:SWI
- (plus:SWI (match_operator:SWI 4 "ix86_carry_flag_operator"
- [(match_operand 3 "flags_reg_operand" "")
- (const_int 0)])
- (match_operand:SWI 1 "nonimmediate_operand" ""))
- (match_operand:SWI 2 "<general_operand>" "")))
- (clobber (reg:CC FLAGS_REG))])]
- "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
- "")
-
-(define_insn "*add<mode>3_carry"
- [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
- (plus:SWI
- (plus:SWI (match_operator 3 "ix86_carry_flag_operator"
- [(reg FLAGS_REG) (const_int 0)])
- (match_operand:SWI 1 "nonimmediate_operand" "%0,0"))
- (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
- (clobber (reg:CC FLAGS_REG))]
- "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
- "adc{<imodesuffix>}\t{%2, %0|%0, %2}"
- [(set_attr "type" "alu")
- (set_attr "use_carry" "1")
- (set_attr "pent_pair" "pu")
- (set_attr "mode" "<MODE>")])
-
-(define_insn "*addsi3_carry_zext"
- [(set (match_operand:DI 0 "register_operand" "=r")
- (zero_extend:DI
- (plus:SI
- (plus:SI (match_operator 3 "ix86_carry_flag_operator"
- [(reg FLAGS_REG) (const_int 0)])
- (match_operand:SI 1 "nonimmediate_operand" "%0"))
- (match_operand:SI 2 "general_operand" "g"))))
- (clobber (reg:CC FLAGS_REG))]
- "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
- "adc{l}\t{%2, %k0|%k0, %2}"
- [(set_attr "type" "alu")
- (set_attr "use_carry" "1")
- (set_attr "pent_pair" "pu")
- (set_attr "mode" "SI")])
-
(define_insn "*add<mode>3_cc"
[(set (reg:CC FLAGS_REG)
(unspec:CC
@@ -5985,19 +5943,6 @@
[(set_attr "type" "alu")
(set_attr "mode" "QI")])
-(define_insn "*add<mode>3_cconly_overflow"
- [(set (reg:CCC FLAGS_REG)
- (compare:CCC
- (plus:SWI
- (match_operand:SWI 1 "nonimmediate_operand" "%0")
- (match_operand:SWI 2 "<general_operand>" "<r><i>m"))
- (match_dup 1)))
- (clobber (match_scratch:SWI 0 "=<r>"))]
- "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
- "add{<imodesuffix>}\t{%2, %0|%0, %2}"
- [(set_attr "type" "alu")
- (set_attr "mode" "<MODE>")])
-
(define_insn "*lea_1"
[(set (match_operand:DWIH 0 "register_operand" "=r")
(match_operand:DWIH 1 "no_seg_address_operand" "p"))]
@@ -7455,62 +7400,6 @@
(clobber (reg:CC FLAGS_REG))])]
"split_<dwi> (&operands[0], 3, &operands[0], &operands[3]);")
-(define_expand "sub<mode>3_carry"
- [(parallel
- [(set (match_operand:SWI 0 "nonimmediate_operand" "")
- (minus:SWI
- (match_operand:SWI 1 "nonimmediate_operand" "")
- (plus:SWI
- (match_operator:SWI 4 "ix86_carry_flag_operator"
- [(match_operand 3 "flags_reg_operand" "")
- (const_int 0)])
- (match_operand:SWI 2 "<general_operand>" ""))))
- (clobber (reg:CC FLAGS_REG))])]
- "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
- "")
-
-(define_insn "*sub<mode>3_carry"
- [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
- (minus:SWI
- (match_operand:SWI 1 "nonimmediate_operand" "0,0")
- (plus:SWI
- (match_operator 3 "ix86_carry_flag_operator"
- [(reg FLAGS_REG) (const_int 0)])
- (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))))
- (clobber (reg:CC FLAGS_REG))]
- "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
- "sbb{<imodesuffix>}\t{%2, %0|%0, %2}"
- [(set_attr "type" "alu")
- (set_attr "use_carry" "1")
- (set_attr "pent_pair" "pu")
- (set_attr "mode" "<MODE>")])
-
-(define_insn "*subsi3_carry_zext"
- [(set (match_operand:DI 0 "register_operand" "=r")
- (zero_extend:DI
- (minus:SI (match_operand:SI 1 "register_operand" "0")
- (plus:SI (match_operator 3 "ix86_carry_flag_operator"
- [(reg FLAGS_REG) (const_int 0)])
- (match_operand:SI 2 "general_operand" "g")))))
- (clobber (reg:CC FLAGS_REG))]
- "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
- "sbb{l}\t{%2, %k0|%k0, %2}"
- [(set_attr "type" "alu")
- (set_attr "pent_pair" "pu")
- (set_attr "mode" "SI")])
-
-(define_insn "*sub<mode>3_cconly_overflow"
- [(set (reg:CCC FLAGS_REG)
- (compare:CCC
- (minus:SWI
- (match_operand:SWI 0 "nonimmediate_operand" "<r>m,<r>")
- (match_operand:SWI 1 "<general_operand>" "<r><i>,<r>m"))
- (match_dup 0)))]
- ""
- "cmp{<imodesuffix>}\t{%1, %0|%0, %1}"
- [(set_attr "type" "icmp")
- (set_attr "mode" "<MODE>")])
-
(define_insn "*sub<mode>_1"
[(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
(minus:SWI
@@ -7600,8 +7489,94 @@
"sub{l}\t{%2, %1|%1, %2}"
[(set_attr "type" "alu")
(set_attr "mode" "SI")])
+\f
+;; Add with carry and subtract with borrow
+(define_expand "<plusminus_insn><mode>3_carry"
+ [(parallel
+ [(set (match_operand:SWI 0 "nonimmediate_operand" "")
+ (plusminus:SWI
+ (match_operand:SWI 1 "nonimmediate_operand" "")
+ (plus:SWI (match_operator:SWI 4 "ix86_carry_flag_operator"
+ [(match_operand 3 "flags_reg_operand" "")
+ (const_int 0)])
+ (match_operand:SWI 2 "<general_operand>" ""))))
+ (clobber (reg:CC FLAGS_REG))])]
+ "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
+ "")
+(define_insn "*<plusminus_insn><mode>3_carry"
+ [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
+ (plusminus:SWI
+ (match_operand:SWI 1 "nonimmediate_operand" "<comm>0,0")
+ (plus:SWI
+ (match_operator 3 "ix86_carry_flag_operator"
+ [(reg FLAGS_REG) (const_int 0)])
+ (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))))
+ (clobber (reg:CC FLAGS_REG))]
+ "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
+ "<plusminus_carry_mnemonic>{<imodesuffix>}\t{%2, %0|%0, %2}"
+ [(set_attr "type" "alu")
+ (set_attr "use_carry" "1")
+ (set_attr "pent_pair" "pu")
+ (set_attr "mode" "<MODE>")])
+
+(define_insn "*addsi3_carry_zext"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (zero_extend:DI
+ (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
+ (plus:SI (match_operator 3 "ix86_carry_flag_operator"
+ [(reg FLAGS_REG) (const_int 0)])
+ (match_operand:SI 2 "general_operand" "g")))))
+ (clobber (reg:CC FLAGS_REG))]
+ "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
+ "adc{l}\t{%2, %k0|%k0, %2}"
+ [(set_attr "type" "alu")
+ (set_attr "use_carry" "1")
+ (set_attr "pent_pair" "pu")
+ (set_attr "mode" "SI")])
+
+(define_insn "*subsi3_carry_zext"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (zero_extend:DI
+ (minus:SI (match_operand:SI 1 "register_operand" "0")
+ (plus:SI (match_operator 3 "ix86_carry_flag_operator"
+ [(reg FLAGS_REG) (const_int 0)])
+ (match_operand:SI 2 "general_operand" "g")))))
+ (clobber (reg:CC FLAGS_REG))]
+ "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
+ "sbb{l}\t{%2, %k0|%k0, %2}"
+ [(set_attr "type" "alu")
+ (set_attr "pent_pair" "pu")
+ (set_attr "mode" "SI")])
+\f
+;; Overflow setting add and subtract instructions
+
+(define_insn "*add<mode>3_cconly_overflow"
+ [(set (reg:CCC FLAGS_REG)
+ (compare:CCC
+ (plus:SWI
+ (match_operand:SWI 1 "nonimmediate_operand" "%0")
+ (match_operand:SWI 2 "<general_operand>" "<r><i>m"))
+ (match_dup 1)))
+ (clobber (match_scratch:SWI 0 "=<r>"))]
+ "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
+ "add{<imodesuffix>}\t{%2, %0|%0, %2}"
+ [(set_attr "type" "alu")
+ (set_attr "mode" "<MODE>")])
+
+(define_insn "*sub<mode>3_cconly_overflow"
+ [(set (reg:CCC FLAGS_REG)
+ (compare:CCC
+ (minus:SWI
+ (match_operand:SWI 0 "nonimmediate_operand" "<r>m,<r>")
+ (match_operand:SWI 1 "<general_operand>" "<r><i>,<r>m"))
+ (match_dup 0)))]
+ ""
+ "cmp{<imodesuffix>}\t{%1, %0|%0, %1}"
+ [(set_attr "type" "icmp")
+ (set_attr "mode" "<MODE>")])
+
(define_insn "*<plusminus_insn><mode>3_cc_overflow"
[(set (reg:CCC FLAGS_REG)
(compare:CCC
@@ -9752,122 +9727,51 @@
\f
;; Negation instructions
-(define_expand "negti2"
- [(set (match_operand:TI 0 "nonimmediate_operand" "")
- (neg:TI (match_operand:TI 1 "nonimmediate_operand" "")))]
- "TARGET_64BIT"
- "ix86_expand_unary_operator (NEG, TImode, operands); DONE;")
-
-(define_insn "*negti2_1"
- [(set (match_operand:TI 0 "nonimmediate_operand" "=ro")
- (neg:TI (match_operand:TI 1 "nonimmediate_operand" "0")))
- (clobber (reg:CC FLAGS_REG))]
- "TARGET_64BIT
- && ix86_unary_operator_ok (NEG, TImode, operands)"
- "#")
-
-(define_split
- [(set (match_operand:TI 0 "nonimmediate_operand" "")
- (neg:TI (match_operand:TI 1 "nonimmediate_operand" "")))
- (clobber (reg:CC FLAGS_REG))]
- "TARGET_64BIT && reload_completed"
- [(parallel
- [(set (reg:CCZ FLAGS_REG)
- (compare:CCZ (neg:DI (match_dup 1)) (const_int 0)))
- (set (match_dup 0) (neg:DI (match_dup 1)))])
- (parallel
- [(set (match_dup 2)
- (plus:DI (plus:DI (ltu:DI (reg:CC FLAGS_REG) (const_int 0))
- (match_dup 3))
- (const_int 0)))
- (clobber (reg:CC FLAGS_REG))])
- (parallel
- [(set (match_dup 2)
- (neg:DI (match_dup 2)))
- (clobber (reg:CC FLAGS_REG))])]
- "split_ti (&operands[0], 2, &operands[0], &operands[2]);")
-
-(define_expand "negdi2"
- [(set (match_operand:DI 0 "nonimmediate_operand" "")
- (neg:DI (match_operand:DI 1 "nonimmediate_operand" "")))]
+(define_expand "neg<mode>2"
+ [(set (match_operand:SDWIM 0 "nonimmediate_operand" "")
+ (neg:SDWIM (match_operand:SDWIM 1 "nonimmediate_operand" "")))]
""
- "ix86_expand_unary_operator (NEG, DImode, operands); DONE;")
+ "ix86_expand_unary_operator (NEG, <MODE>mode, operands); DONE;")
-(define_insn "*negdi2_1"
- [(set (match_operand:DI 0 "nonimmediate_operand" "=ro")
- (neg:DI (match_operand:DI 1 "general_operand" "0")))
+(define_insn_and_split "*neg<dwi>2_doubleword"
+ [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro")
+ (neg:<DWI> (match_operand:<DWI> 1 "nonimmediate_operand" "0")))
(clobber (reg:CC FLAGS_REG))]
- "!TARGET_64BIT
- && ix86_unary_operator_ok (NEG, DImode, operands)"
- "#")
-
-(define_split
- [(set (match_operand:DI 0 "nonimmediate_operand" "")
- (neg:DI (match_operand:DI 1 "general_operand" "")))
- (clobber (reg:CC FLAGS_REG))]
- "!TARGET_64BIT && reload_completed"
+ "ix86_unary_operator_ok (NEG, <DWI>mode, operands)"
+ "#"
+ "reload_completed"
[(parallel
[(set (reg:CCZ FLAGS_REG)
- (compare:CCZ (neg:SI (match_dup 1)) (const_int 0)))
- (set (match_dup 0) (neg:SI (match_dup 1)))])
+ (compare:CCZ (neg:DWIH (match_dup 1)) (const_int 0)))
+ (set (match_dup 0) (neg:DWIH (match_dup 1)))])
(parallel
[(set (match_dup 2)
- (plus:SI (plus:SI (ltu:SI (reg:CC FLAGS_REG) (const_int 0))
- (match_dup 3))
- (const_int 0)))
+ (plus:DWIH (match_dup 3)
+ (plus:DWIH (ltu:DWIH (reg:CC FLAGS_REG) (const_int 0))
+ (const_int 0))))
(clobber (reg:CC FLAGS_REG))])
(parallel
[(set (match_dup 2)
- (neg:SI (match_dup 2)))
+ (neg:DWIH (match_dup 2)))
(clobber (reg:CC FLAGS_REG))])]
- "split_di (&operands[0], 2, &operands[0], &operands[2]);");
+ "split_<dwi> (&operands[0], 2, &operands[0], &operands[2]);")
-(define_insn "*negdi2_1_rex64"
- [(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
- (neg:DI (match_operand:DI 1 "nonimmediate_operand" "0")))
+(define_insn "*neg<mode>2_1"
+ [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
+ (neg:SWI (match_operand:SWI 1 "nonimmediate_operand" "0")))
(clobber (reg:CC FLAGS_REG))]
- "TARGET_64BIT && ix86_unary_operator_ok (NEG, DImode, operands)"
- "neg{q}\t%0"
+ "ix86_unary_operator_ok (NEG, <MODE>mode, operands)"
+ "neg{<imodesuffix>}\t%0"
[(set_attr "type" "negnot")
- (set_attr "mode" "DI")])
+ (set_attr "mode" "<MODE>")])
-;; The problem with neg is that it does not perform (compare x 0),
-;; it really performs (compare 0 x), which leaves us with the zero
-;; flag being the only useful item.
-
-(define_insn "*negdi2_cmpz_rex64"
- [(set (reg:CCZ FLAGS_REG)
- (compare:CCZ (neg:DI (match_operand:DI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
- (neg:DI (match_dup 1)))]
- "TARGET_64BIT && ix86_unary_operator_ok (NEG, DImode, operands)"
- "neg{q}\t%0"
- [(set_attr "type" "negnot")
- (set_attr "mode" "DI")])
-
-
-(define_expand "negsi2"
- [(set (match_operand:SI 0 "nonimmediate_operand" "")
- (neg:SI (match_operand:SI 1 "nonimmediate_operand" "")))]
- ""
- "ix86_expand_unary_operator (NEG, SImode, operands); DONE;")
-
-(define_insn "*negsi2_1"
- [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
- (neg:SI (match_operand:SI 1 "nonimmediate_operand" "0")))
- (clobber (reg:CC FLAGS_REG))]
- "ix86_unary_operator_ok (NEG, SImode, operands)"
- "neg{l}\t%0"
- [(set_attr "type" "negnot")
- (set_attr "mode" "SI")])
-
;; Combine is quite creative about this pattern.
(define_insn "*negsi2_1_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
- (lshiftrt:DI (neg:DI (ashift:DI (match_operand:DI 1 "register_operand" "0")
- (const_int 32)))
- (const_int 32)))
+ (lshiftrt:DI
+ (neg:DI (ashift:DI (match_operand:DI 1 "register_operand" "0")
+ (const_int 32)))
+ (const_int 32)))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && ix86_unary_operator_ok (NEG, SImode, operands)"
"neg{l}\t%k0"
@@ -9878,25 +9782,27 @@
;; it really performs (compare 0 x), which leaves us with the zero
;; flag being the only useful item.
-(define_insn "*negsi2_cmpz"
+(define_insn "*neg<mode>2_cmpz"
[(set (reg:CCZ FLAGS_REG)
- (compare:CCZ (neg:SI (match_operand:SI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
- (neg:SI (match_dup 1)))]
- "ix86_unary_operator_ok (NEG, SImode, operands)"
- "neg{l}\t%0"
+ (compare:CCZ
+ (neg:SWI (match_operand:SWI 1 "nonimmediate_operand" "0"))
+ (const_int 0)))
+ (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
+ (neg:SWI (match_dup 1)))]
+ "ix86_unary_operator_ok (NEG, <MODE>mode, operands)"
+ "neg{<imodesuffix>}\t%0"
[(set_attr "type" "negnot")
- (set_attr "mode" "SI")])
+ (set_attr "mode" "<MODE>")])
(define_insn "*negsi2_cmpz_zext"
[(set (reg:CCZ FLAGS_REG)
- (compare:CCZ (lshiftrt:DI
- (neg:DI (ashift:DI
- (match_operand:DI 1 "register_operand" "0")
- (const_int 32)))
- (const_int 32))
- (const_int 0)))
+ (compare:CCZ
+ (lshiftrt:DI
+ (neg:DI (ashift:DI
+ (match_operand:DI 1 "register_operand" "0")
+ (const_int 32)))
+ (const_int 32))
+ (const_int 0)))
(set (match_operand:DI 0 "register_operand" "=r")
(lshiftrt:DI (neg:DI (ashift:DI (match_dup 1)
(const_int 32)))
@@ -9906,58 +9812,6 @@
[(set_attr "type" "negnot")
(set_attr "mode" "SI")])
-(define_expand "neghi2"
- [(set (match_operand:HI 0 "nonimmediate_operand" "")
- (neg:HI (match_operand:HI 1 "nonimmediate_operand" "")))]
- "TARGET_HIMODE_MATH"
- "ix86_expand_unary_operator (NEG, HImode, operands); DONE;")
-
-(define_insn "*neghi2_1"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
- (neg:HI (match_operand:HI 1 "nonimmediate_operand" "0")))
- (clobber (reg:CC FLAGS_REG))]
- "ix86_unary_operator_ok (NEG, HImode, operands)"
- "neg{w}\t%0"
- [(set_attr "type" "negnot")
- (set_attr "mode" "HI")])
-
-(define_insn "*neghi2_cmpz"
- [(set (reg:CCZ FLAGS_REG)
- (compare:CCZ (neg:HI (match_operand:HI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
- (neg:HI (match_dup 1)))]
- "ix86_unary_operator_ok (NEG, HImode, operands)"
- "neg{w}\t%0"
- [(set_attr "type" "negnot")
- (set_attr "mode" "HI")])
-
-(define_expand "negqi2"
- [(set (match_operand:QI 0 "nonimmediate_operand" "")
- (neg:QI (match_operand:QI 1 "nonimmediate_operand" "")))]
- "TARGET_QIMODE_MATH"
- "ix86_expand_unary_operator (NEG, QImode, operands); DONE;")
-
-(define_insn "*negqi2_1"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
- (neg:QI (match_operand:QI 1 "nonimmediate_operand" "0")))
- (clobber (reg:CC FLAGS_REG))]
- "ix86_unary_operator_ok (NEG, QImode, operands)"
- "neg{b}\t%0"
- [(set_attr "type" "negnot")
- (set_attr "mode" "QI")])
-
-(define_insn "*negqi2_cmpz"
- [(set (reg:CCZ FLAGS_REG)
- (compare:CCZ (neg:QI (match_operand:QI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
- (neg:QI (match_dup 1)))]
- "ix86_unary_operator_ok (NEG, QImode, operands)"
- "neg{b}\t%0"
- [(set_attr "type" "negnot")
- (set_attr "mode" "QI")])
-
;; Changing of sign for FP values is doable using integer unit too.
(define_expand "<code><mode>2"
@@ -10240,96 +10094,66 @@
\f
;; One complement instructions
-(define_expand "one_cmpldi2"
- [(set (match_operand:DI 0 "nonimmediate_operand" "")
- (not:DI (match_operand:DI 1 "nonimmediate_operand" "")))]
- "TARGET_64BIT"
- "ix86_expand_unary_operator (NOT, DImode, operands); DONE;")
+(define_expand "one_cmpl<mode>2"
+ [(set (match_operand:SWIM 0 "nonimmediate_operand" "")
+ (not:SWIM (match_operand:SWIM 1 "nonimmediate_operand" "")))]
+ ""
+ "ix86_expand_unary_operator (NOT, <MODE>mode, operands); DONE;")
-(define_insn "*one_cmpldi2_1_rex64"
- [(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
- (not:DI (match_operand:DI 1 "nonimmediate_operand" "0")))]
- "TARGET_64BIT && ix86_unary_operator_ok (NOT, DImode, operands)"
- "not{q}\t%0"
+(define_insn "*one_cmpl<mode>2_1"
+ [(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm")
+ (not:SWI248 (match_operand:SWI248 1 "nonimmediate_operand" "0")))]
+ "ix86_unary_operator_ok (NOT, <MODE>mode, operands)"
+ "not{<imodesuffix>}\t%0"
[(set_attr "type" "negnot")
- (set_attr "mode" "DI")])
+ (set_attr "mode" "<MODE>")])
-(define_insn "*one_cmpldi2_2_rex64"
- [(set (reg FLAGS_REG)
- (compare (not:DI (match_operand:DI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
- (not:DI (match_dup 1)))]
- "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)
- && ix86_unary_operator_ok (NOT, DImode, operands)"
- "#"
- [(set_attr "type" "alu1")
- (set_attr "mode" "DI")])
-
-(define_split
- [(set (match_operand 0 "flags_reg_operand" "")
- (match_operator 2 "compare_operator"
- [(not:DI (match_operand:DI 3 "nonimmediate_operand" ""))
- (const_int 0)]))
- (set (match_operand:DI 1 "nonimmediate_operand" "")
- (not:DI (match_dup 3)))]
- "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)"
- [(parallel [(set (match_dup 0)
- (match_op_dup 2
- [(xor:DI (match_dup 3) (const_int -1))
- (const_int 0)]))
- (set (match_dup 1)
- (xor:DI (match_dup 3) (const_int -1)))])]
- "")
-
-(define_expand "one_cmplsi2"
- [(set (match_operand:SI 0 "nonimmediate_operand" "")
- (not:SI (match_operand:SI 1 "nonimmediate_operand" "")))]
- ""
- "ix86_expand_unary_operator (NOT, SImode, operands); DONE;")
-
-(define_insn "*one_cmplsi2_1"
- [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
- (not:SI (match_operand:SI 1 "nonimmediate_operand" "0")))]
- "ix86_unary_operator_ok (NOT, SImode, operands)"
- "not{l}\t%0"
+;; %%% Potential partial reg stall on alternative 1. What to do?
+(define_insn "*one_cmplqi2_1"
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r")
+ (not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")))]
+ "ix86_unary_operator_ok (NOT, QImode, operands)"
+ "@
+ not{b}\t%0
+ not{l}\t%k0"
[(set_attr "type" "negnot")
- (set_attr "mode" "SI")])
+ (set_attr "mode" "QI,SI")])
;; ??? Currently never generated - xor is used instead.
(define_insn "*one_cmplsi2_1_zext"
[(set (match_operand:DI 0 "register_operand" "=r")
- (zero_extend:DI (not:SI (match_operand:SI 1 "register_operand" "0"))))]
+ (zero_extend:DI
+ (not:SI (match_operand:SI 1 "register_operand" "0"))))]
"TARGET_64BIT && ix86_unary_operator_ok (NOT, SImode, operands)"
"not{l}\t%k0"
[(set_attr "type" "negnot")
(set_attr "mode" "SI")])
-(define_insn "*one_cmplsi2_2"
+(define_insn "*one_cmpl<mode>2_2"
[(set (reg FLAGS_REG)
- (compare (not:SI (match_operand:SI 1 "nonimmediate_operand" "0"))
+ (compare (not:SWI (match_operand:SWI 1 "nonimmediate_operand" "0"))
(const_int 0)))
- (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
- (not:SI (match_dup 1)))]
+ (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
+ (not:SWI (match_dup 1)))]
"ix86_match_ccmode (insn, CCNOmode)
- && ix86_unary_operator_ok (NOT, SImode, operands)"
+ && ix86_unary_operator_ok (NOT, <MODE>mode, operands)"
"#"
[(set_attr "type" "alu1")
- (set_attr "mode" "SI")])
+ (set_attr "mode" "<MODE>")])
(define_split
[(set (match_operand 0 "flags_reg_operand" "")
(match_operator 2 "compare_operator"
- [(not:SI (match_operand:SI 3 "nonimmediate_operand" ""))
+ [(not:SWI (match_operand:SWI 3 "nonimmediate_operand" ""))
(const_int 0)]))
- (set (match_operand:SI 1 "nonimmediate_operand" "")
- (not:SI (match_dup 3)))]
+ (set (match_operand:SWI 1 "nonimmediate_operand" "")
+ (not:SWI (match_dup 3)))]
"ix86_match_ccmode (insn, CCNOmode)"
[(parallel [(set (match_dup 0)
- (match_op_dup 2 [(xor:SI (match_dup 3) (const_int -1))
+ (match_op_dup 2 [(xor:SWI (match_dup 3) (const_int -1))
(const_int 0)]))
(set (match_dup 1)
- (xor:SI (match_dup 3) (const_int -1)))])]
+ (xor:SWI (match_dup 3) (const_int -1)))])]
"")
;; ??? Currently never generated - xor is used instead.
@@ -10359,91 +10183,6 @@
(set (match_dup 1)
(zero_extend:DI (xor:SI (match_dup 3) (const_int -1))))])]
"")
-
-(define_expand "one_cmplhi2"
- [(set (match_operand:HI 0 "nonimmediate_operand" "")
- (not:HI (match_operand:HI 1 "nonimmediate_operand" "")))]
- "TARGET_HIMODE_MATH"
- "ix86_expand_unary_operator (NOT, HImode, operands); DONE;")
-
-(define_insn "*one_cmplhi2_1"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
- (not:HI (match_operand:HI 1 "nonimmediate_operand" "0")))]
- "ix86_unary_operator_ok (NOT, HImode, operands)"
- "not{w}\t%0"
- [(set_attr "type" "negnot")
- (set_attr "mode" "HI")])
-
-(define_insn "*one_cmplhi2_2"
- [(set (reg FLAGS_REG)
- (compare (not:HI (match_operand:HI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
- (not:HI (match_dup 1)))]
- "ix86_match_ccmode (insn, CCNOmode)
- && ix86_unary_operator_ok (NEG, HImode, operands)"
- "#"
- [(set_attr "type" "alu1")
- (set_attr "mode" "HI")])
-
-(define_split
- [(set (match_operand 0 "flags_reg_operand" "")
- (match_operator 2 "compare_operator"
- [(not:HI (match_operand:HI 3 "nonimmediate_operand" ""))
- (const_int 0)]))
- (set (match_operand:HI 1 "nonimmediate_operand" "")
- (not:HI (match_dup 3)))]
- "ix86_match_ccmode (insn, CCNOmode)"
- [(parallel [(set (match_dup 0)
- (match_op_dup 2 [(xor:HI (match_dup 3) (const_int -1))
- (const_int 0)]))
- (set (match_dup 1)
- (xor:HI (match_dup 3) (const_int -1)))])]
- "")
-
-;; %%% Potential partial reg stall on alternative 1. What to do?
-(define_expand "one_cmplqi2"
- [(set (match_operand:QI 0 "nonimmediate_operand" "")
- (not:QI (match_operand:QI 1 "nonimmediate_operand" "")))]
- "TARGET_QIMODE_MATH"
- "ix86_expand_unary_operator (NOT, QImode, operands); DONE;")
-
-(define_insn "*one_cmplqi2_1"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r")
- (not:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")))]
- "ix86_unary_operator_ok (NOT, QImode, operands)"
- "@
- not{b}\t%0
- not{l}\t%k0"
- [(set_attr "type" "negnot")
- (set_attr "mode" "QI,SI")])
-
-(define_insn "*one_cmplqi2_2"
- [(set (reg FLAGS_REG)
- (compare (not:QI (match_operand:QI 1 "nonimmediate_operand" "0"))
- (const_int 0)))
- (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
- (not:QI (match_dup 1)))]
- "ix86_match_ccmode (insn, CCNOmode)
- && ix86_unary_operator_ok (NOT, QImode, operands)"
- "#"
- [(set_attr "type" "alu1")
- (set_attr "mode" "QI")])
-
-(define_split
- [(set (match_operand 0 "flags_reg_operand" "")
- (match_operator 2 "compare_operator"
- [(not:QI (match_operand:QI 3 "nonimmediate_operand" ""))
- (const_int 0)]))
- (set (match_operand:QI 1 "nonimmediate_operand" "")
- (not:QI (match_dup 3)))]
- "ix86_match_ccmode (insn, CCNOmode)"
- [(parallel [(set (match_dup 0)
- (match_op_dup 2 [(xor:QI (match_dup 3) (const_int -1))
- (const_int 0)]))
- (set (match_dup 1)
- (xor:QI (match_dup 3) (const_int -1)))])]
- "")
\f
;; Arithmetic shift instructions
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2009-11-24 20:45 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2009-11-24 20:53 [PATCH, i386]: Further macroization of insn patterns Uros Bizjak
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).