From: Bernd Schmidt <bernds@codesourcery.com>
To: Jeff Law <law@redhat.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
John David Anglin <dave@hiauly1.hia.nrc.ca>
Subject: Re: Emit more REG_EQUIV notes for function args (PR42235)
Date: Mon, 19 Jul 2010 09:55:00 -0000 [thread overview]
Message-ID: <4C4420F2.5010807@codesourcery.com> (raw)
In-Reply-To: <4C3F41BA.7070905@codesourcery.com>
[-- Attachment #1: Type: text/plain, Size: 918 bytes --]
On 07/15/2010 07:13 PM, Bernd Schmidt wrote:
> On 07/15/2010 12:28 AM, Jeff Law wrote:
>> On 07/14/10 15:30, Bernd Schmidt wrote:
>>> If necessary I can try to test for a single insn with single_set and
>>> push it to the sequence otherwise.
>>>
>> For the mn103, the conversions were single insns...
>>
>> Ultimately, I think you have to peek at the insn(s) and see what
>> registers they set/clobber.
>
> How's this? Bootstrapped and tested on i686-linux. ARM tests in progress.
This seems to have caused a bootstrap failure on hppa. A QImode value
is passed in a SImode reg and then should get extended to DImode; we
must make sure we use a qidi extension. The following patch does that;
I've not heard back whether it fixes the hppa bootstrap, but it seems to
work on arm-linux (one extra testsuite failure caused by an unrelated
change in the same tree). Also bootstrapped on i686-linux. Ok?
Bernd
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* function.c (assign_parm_setup_reg): Use nominal_mode as the
source mode for extensions.
Index: function.c
===================================================================
--- function.c (revision 162277)
+++ function.c (working copy)
@@ -2940,18 +2940,18 @@ assign_parm_setup_reg (struct assign_par
First, we try to emit an insn which performs the necessary
conversion. We verify that this insn does not clobber any
hard registers. */
-
+ enum machine_mode entry_mode = data->nominal_mode;
enum insn_code icode;
rtx op0, op1;
- icode = can_extend_p (promoted_nominal_mode, data->passed_mode,
+ icode = can_extend_p (promoted_nominal_mode, entry_mode,
unsignedp);
op0 = parmreg;
op1 = validated_mem;
if (icode != CODE_FOR_nothing
&& insn_data[icode].operand[0].predicate (op0, promoted_nominal_mode)
- && insn_data[icode].operand[1].predicate (op1, data->passed_mode))
+ && insn_data[icode].operand[1].predicate (op1, entry_mode))
{
enum rtx_code code = unsignedp ? ZERO_EXTEND : SIGN_EXTEND;
rtx insn, insns;
@@ -2959,7 +2959,7 @@ assign_parm_setup_reg (struct assign_par
start_sequence ();
insn = gen_extend_insn (op0, op1, promoted_nominal_mode,
- data->passed_mode, unsignedp);
+ entry_mode, unsignedp);
emit_insn (insn);
insns = get_insns ();
next prev parent reply other threads:[~2010-07-19 9:55 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-14 11:14 Bernd Schmidt
2010-07-14 18:54 ` Jeff Law
2010-07-14 21:30 ` Bernd Schmidt
2010-07-14 22:28 ` Jeff Law
2010-07-15 17:14 ` Bernd Schmidt
2010-07-15 21:26 ` Jeff Law
2010-07-19 9:55 ` Bernd Schmidt [this message]
2010-07-19 16:51 ` Jeff Law
2010-07-19 16:53 ` Bernd Schmidt
2010-07-19 16:59 ` Richard Henderson
2010-07-19 17:09 ` Jeff Law
2010-07-19 19:06 ` John David Anglin
2010-07-21 22:53 ` Bernd Schmidt
2010-07-14 21:48 ` Bernd Schmidt
2010-07-14 22:22 ` Jeff Law
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