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From: Chung-Lin Tang <cltang@codesourcery.com>
To: gcc-patches@gcc.gnu.org
Cc: paul@codesourcery.com, rearnsha@arm.com
Subject: Ping^3 Re: [patch, ARM] ICE in get_arm_condition_code()
Date: Tue, 15 Mar 2011 01:40:00 -0000	[thread overview]
Message-ID: <4D7EC360.8070506@codesourcery.com> (raw)
In-Reply-To: <4D74E76F.2080401@codesourcery.com>

Ping.

On 2011/3/7 10:10 PM, Chung-Lin Tang wrote:
> Ping.
> 
> On 2011/1/26 11:09 AM, Chung-Lin Tang wrote:
>> Ping.
>> (I'll fix the minor nits before actually committing, thanks Ramana :)
>>
>> On 2011/1/13 08:24, Chung-Lin Tang wrote:
>>> Hi,
>>> there's an ICE in arm.c:get_arm_condition_code(), from here:
>>> https://bugs.launchpad.net/gcc-linaro/+bug/689887
>>>
>>> The report was on a 4.5 based compiler, but I verified it also occurs on
>>> current trunk, under Thumb-2.
>>>
>>> The problem as I found, happens in RTL ifcvt after the combine pass.
>>> ifcvt.c:noce_emit_cmove() creates this:
>>> (insn 58 57 59 4 (parallel [
>>>             (set (reg:CC_NCV 24 cc)
>>>                 (compare:CC_NCV (reg:DI 140)
>>>                     (reg:DI 147)))
>>>             (clobber (scratch:SI))
>>>         ]) p.c:13 202 {*arm_cmpdi_insn}
>>>      (nil))
>>>
>>> (insn 59 58 60 4 (set (reg:SI 146)
>>> 	(if_then_else:SI (gt (reg:CC_NCV 24 cc)
>>>                 (const_int 0 [0]))
>>>             (reg:SI 145)
>>>             (reg:SI 144))) p.c:13 701 {*thumb2_movsicc_insn}
>>>      (nil))
>>>
>>> which is wrong; the GT comparison requires testing of the Z, C, and V
>>> flags, which CC_NCV does not satisfy. The ICE happens later when the asm
>>> emitting actually hits assert fail in get_arm_condition_code().
>>>
>>> This patch fixes this by stratifying the "arm_comparison_operator"
>>> predicate, by leveraging the current logic in get_arm_condition_code().
>>> I abstracted out the body into a new arm_comparison_to_cond_code()
>>> function, which returns an invalid code instead of assert fail, and used
>>> it to add a check to the comparison RTX in "arm_comparison_operator".
>>> This way, invalid comparisons like the above would be blocked from emitting.
>>>
>>> Tests were run with no regressions found. Okay for trunk?
>>>
>>> Thanks,
>>> Chung-Lin
>>>
>>> 2011-01-12  Chung-Lin Tang  <cltang@codesourcery.com>
>>>
>>>         * config/arm/arm.h (enum arm_cond_code): Add ARM_COND_INVALID.
>>>         * config/arm/arm.c (arm_comparison_to_cond_code): Renamed from
>>>         get_arm_condition_code(), change gcc_unreachable()s to return
>>>         ARM_COND_INVALID.
>>>         (get_arm_condition_code): Implement by calling
>>>         arm_comparison_to_cond_code(), with result test by gcc_assert().
>>>         (arm_valid_comparison_p): New function to test for valid ARM
>>>         comparison RTX.
>>>         * config/arm/arm-protos.h (arm_valid_comparison_p): Add
>>> 	prototype.
>>>         * config/arm/predicates.md (arm_comparison_operator): Add
>>> 	additional check based on arm_valid_comparison_p().
>>>
>>>         testsuite/
>>>         * gcc.target/arm/20110112-1.c: New test.
>>>
>>>
>>>
>>
> 

      reply	other threads:[~2011-03-15  1:40 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-01-13  1:37 Chung-Lin Tang
2011-01-13 11:33 ` Ramana Radhakrishnan
2011-01-26  3:48 ` Chung-Lin Tang
2011-03-07 14:10   ` Ping " Chung-Lin Tang
2011-03-15  1:40     ` Chung-Lin Tang [this message]

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