From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30927 invoked by alias); 1 Apr 2011 14:46:05 -0000 Received: (qmail 30887 invoked by uid 22791); 1 Apr 2011 14:46:03 -0000 X-SWARE-Spam-Status: No, hits=-1.5 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 01 Apr 2011 14:45:58 +0000 Received: (qmail 8128 invoked from network); 1 Apr 2011 14:45:57 -0000 Received: from unknown (HELO ?192.168.1.66?) (vries@127.0.0.2) by mail.codesourcery.com with ESMTPA; 1 Apr 2011 14:45:57 -0000 Message-ID: <4D95E523.1050800@codesourcery.com> Date: Fri, 01 Apr 2011 14:46:00 -0000 From: Tom de Vries User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.14) Gecko/20110223 Lightning/1.0b2 Thunderbird/3.1.8 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org Subject: Re: [PATCH, PR43920, 1/9] ARM specific part. References: <4D94C603.7080505@codesourcery.com> <4D94C6FB.1080309@codesourcery.com> In-Reply-To: <4D94C6FB.1080309@codesourcery.com> Content-Type: multipart/mixed; boundary="------------070209070309040200040003" Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-04/txt/msg00033.txt.bz2 This is a multi-part message in MIME format. --------------070209070309040200040003 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-length: 27 Reposting, with ChangeLog. --------------070209070309040200040003 Content-Type: text/x-patch; name="1_arm-size-branch_cost.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="1_arm-size-branch_cost.patch" Content-length: 773 2011-04-01 Tom de Vries PR target/43920 * config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing for size. Index: gcc/config/arm/arm.h =================================================================== --- gcc/config/arm/arm.h (revision 293961) +++ gcc/config/arm/arm.h (revision 293962) @@ -2201,7 +2201,8 @@ typedef struct /* Try to generate sequences that don't involve branches, we can then use conditional instructions */ #define BRANCH_COST(speed_p, predictable_p) \ - (TARGET_32BIT ? 4 : (optimize > 0 ? 2 : 0)) + (TARGET_32BIT ? (TARGET_THUMB2 && optimize_size ? 1 : 4) \ + : (optimize > 0 ? 2 : 0)) /* Position Independent Code. */ /* We decide which register to use based on the compilation options and --------------070209070309040200040003--