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Date: Wed, 06 Apr 2011 17:16:00 -0000
From: Aldy Hernandez <aldyh@redhat.com>
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To: Michael Matz <matz@suse.de>
CC: Richard Guenther <richard.guenther@gmail.com>,        Richard Henderson <rth@redhat.com>, Jeff Law <law@redhat.com>,        gcc-patches <gcc-patches@gcc.gnu.org>,        Jakub Jelinek <jakub@redhat.com>
Subject: Re: [cxx-mem-model] bitfield tests
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On 04/06/11 10:29, Michael Matz wrote:
> Hi,
>
> On Mon, 4 Apr 2011, Aldy Hernandez wrote:
>
>>
>>>> (5) Do we agree that all such cpus use a byte-granular modification mask?
>>
>>> Now, as of (0) I might agree to disregard the original Alpha, but as the
>>> embedded world moves to SMP I'm not sure we can disregard
>>> non-cache coherent NUMA setups or even CPUs without a byte store.
>>
>> As per 5, it doesn't matter if the CPU lacks a byte store, since the
>> cache has a byte-granular modification mask.
>
> If it doesn't have byte stores there's no need for byte-granular
> modification masks :)

I was talking about a CPU with a byte store that is implemented in the 
microcode with a wider operation and logical operations that may touch 
adjacent fields.  If adjacent bytes were touched, the cache would be 
updated accordingly, hence the byte-granular modification mask.  That's 
my understanding anyhow.