From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13770 invoked by alias); 19 May 2011 15:51:04 -0000 Received: (qmail 13727 invoked by uid 22791); 19 May 2011 15:51:00 -0000 X-SWARE-Spam-Status: No, hits=-2.4 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from va3ehsobe005.messaging.microsoft.com (HELO VA3EHSOBE005.bigfish.com) (216.32.180.31) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 19 May 2011 15:50:43 +0000 Received: from mail159-va3-R.bigfish.com (10.7.14.250) by VA3EHSOBE005.bigfish.com (10.7.40.25) with Microsoft SMTP Server id 14.1.225.22; Thu, 19 May 2011 15:50:42 +0000 Received: from mail159-va3 (localhost.localdomain [127.0.0.1]) by mail159-va3-R.bigfish.com (Postfix) with ESMTP id 100871268477 for ; Thu, 19 May 2011 15:50:42 +0000 (UTC) X-SpamScore: -5 X-BigFish: VS-5(zz154dMzz1202hzz8275dhz2dh2a8h668h839h34h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190;KIP:(null);UIP:(null);IPVD:NLI;H:mail.freescale.net;RD:none;EFVD:NLI Received: from mail159-va3 (localhost.localdomain [127.0.0.1]) by mail159-va3 (MessageSwitch) id 1305820241886721_8247; Thu, 19 May 2011 15:50:41 +0000 (UTC) Received: from VA3EHSMHS011.bigfish.com (unknown [10.7.14.243]) by mail159-va3.bigfish.com (Postfix) with ESMTP id D468A45004E for ; Thu, 19 May 2011 15:50:41 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS011.bigfish.com (10.7.99.21) with Microsoft SMTP Server (TLS) id 14.1.225.22; Thu, 19 May 2011 15:50:41 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.270.2; Thu, 19 May 2011 10:50:40 -0500 Received: from [10.82.138.37] (katy.am.freescale.net [10.82.138.37]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p4JFodZP007862 for ; Thu, 19 May 2011 10:50:39 -0500 (CDT) Message-ID: <4DD53BAA.8070603@freescale.com> Date: Thu, 19 May 2011 18:10:00 -0000 From: edmar User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110428 Fedora/3.1.10-1.fc14 Lightning/1.0b3pre Thunderbird/3.1.10 MIME-Version: 1.0 To: Subject: [RFA] [PR44618] [PowerPC] Wrong code for -frename-registers Content-Type: multipart/mixed; boundary="------------080808000803080200070607" X-OriginatorOrg: freescale.com Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-05/txt/msg01398.txt.bz2 --------------080808000803080200070607 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Content-length: 450 The original patch posted in bugzilla was fully tested for 4.4/4.5/4.6 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44618 I am reposting it here as a reference for review. More recently, I re-tested it for 4.6, and it still pass with no regressions on powerpc (32 bits) If the general approach of the solution is acceptable, I would like to have it re-tested with the latest in 4.4/4.5/4.6/4.7 and get it committed in all branches. Thanks Edmar --------------080808000803080200070607 Content-Type: text/plain; name="sub_ppc_rnreg2-Changelog-gcc" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="sub_ppc_rnreg2-Changelog-gcc" Content-length: 545 2010-06-21 Edmar Wienskoski edmar@freescale.com * rs6000.md (save_gpregs_): Replaced pattern with a set of similar patterns, where the MATCH_OPERAND for the function argument is replaced with individual references to hardware registers. * rs6000.md (save_fpregs_): Ditto * rs6000.md (save_gpregs_): Ditto * rs6000.md (restore_gpregs_): Ditto * rs6000.md (return_and_restore_gpregs_): Ditto * rs6000.md (return_and_restore_fpregs_): Ditto * rs6000.md (return_and_restore_fpregs_aix_): Ditto --------------080808000803080200070607 Content-Type: text/plain; name="sub_ppc_rnreg2-Changelog-testsuite" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="sub_ppc_rnreg2-Changelog-testsuite" Content-length: 106 2010-06-21 Edmar Wienskoski edmar@freescale.com * gcc.target/powerpc/outofline_rnreg.c: New testcase. --------------080808000803080200070607 Content-Type: text/x-patch; name="sub_ppc_rnreg2.diff" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="sub_ppc_rnreg2.diff" Content-length: 11603 Index: gcc-20100617/gcc/config/rs6000/rs6000.md =================================================================== --- gcc-20100617/gcc/config/rs6000/rs6000.md (revision 161285) +++ gcc-20100617/gcc/config/rs6000/rs6000.md (working copy) @@ -15448,30 +15448,93 @@ "{stm|stmw} %2,%1" [(set_attr "type" "store_ux")]) -(define_insn "*save_gpregs_" +; The following comment applies to: +; save_gpregs_* +; save_fpregs_* +; restore_gpregs* +; return_and_restore_gpregs* +; return_and_restore_fpregs* +; return_and_restore_fpregs_aix* +; +; The out-of-line save / restore functions expects one input argument. +; Since those are not standard call_insn's, we must avoid using +; MATCH_OPERAND for that argument. That way the register rename +; optimization will not try to rename this register. +; Each pattern is repeated for each possible register number used in +; various ABIs (r11, r1, and for some functions r12) + +(define_insn "*save_gpregs__r11" [(match_parallel 0 "any_parallel_operand" [(clobber (reg:P 65)) (use (match_operand:P 1 "symbol_ref_operand" "s")) - (use (match_operand:P 2 "gpc_reg_operand" "r")) - (set (match_operand:P 3 "memory_operand" "=m") - (match_operand:P 4 "gpc_reg_operand" "r"))])] + (use (reg:P 11)) + (set (match_operand:P 2 "memory_operand" "=m") + (match_operand:P 3 "gpc_reg_operand" "r"))])] "" "bl %1" [(set_attr "type" "branch") (set_attr "length" "4")]) -(define_insn "*save_fpregs_" +(define_insn "*save_gpregs__r12" [(match_parallel 0 "any_parallel_operand" [(clobber (reg:P 65)) (use (match_operand:P 1 "symbol_ref_operand" "s")) - (use (match_operand:P 2 "gpc_reg_operand" "r")) - (set (match_operand:DF 3 "memory_operand" "=m") - (match_operand:DF 4 "gpc_reg_operand" "d"))])] + (use (reg:P 12)) + (set (match_operand:P 2 "memory_operand" "=m") + (match_operand:P 3 "gpc_reg_operand" "r"))])] "" "bl %1" [(set_attr "type" "branch") (set_attr "length" "4")]) +(define_insn "*save_gpregs__r1" + [(match_parallel 0 "any_parallel_operand" + [(clobber (reg:P 65)) + (use (match_operand:P 1 "symbol_ref_operand" "s")) + (use (reg:P 1)) + (set (match_operand:P 2 "memory_operand" "=m") + (match_operand:P 3 "gpc_reg_operand" "r"))])] + "" + "bl %1" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + +(define_insn "*save_fpregs__r11" + [(match_parallel 0 "any_parallel_operand" + [(clobber (reg:P 65)) + (use (match_operand:P 1 "symbol_ref_operand" "s")) + (use (reg:P 11)) + (set (match_operand:DF 2 "memory_operand" "=m") + (match_operand:DF 3 "gpc_reg_operand" "d"))])] + "" + "bl %1" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + +(define_insn "*save_fpregs__r12" + [(match_parallel 0 "any_parallel_operand" + [(clobber (reg:P 65)) + (use (match_operand:P 1 "symbol_ref_operand" "s")) + (use (reg:P 12)) + (set (match_operand:DF 2 "memory_operand" "=m") + (match_operand:DF 3 "gpc_reg_operand" "d"))])] + "" + "bl %1" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + +(define_insn "*save_fpregs__r1" + [(match_parallel 0 "any_parallel_operand" + [(clobber (reg:P 65)) + (use (match_operand:P 1 "symbol_ref_operand" "s")) + (use (reg:P 1)) + (set (match_operand:DF 2 "memory_operand" "=m") + (match_operand:DF 3 "gpc_reg_operand" "d"))])] + "" + "bl %1" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + ; These are to explain that changes to the stack pointer should ; not be moved over stores to stack memory. (define_insn "stack_tie" @@ -15564,57 +15627,161 @@ ; FIXME: This would probably be somewhat simpler if the Cygnus sibcall ; stuff was in GCC. Oh, and "any_parallel_operand" is a bit flexible... -(define_insn "*restore_gpregs_" +; The following comment applies to: +; save_gpregs_* +; save_fpregs_* +; restore_gpregs* +; return_and_restore_gpregs* +; return_and_restore_fpregs* +; return_and_restore_fpregs_aix* +; +; The out-of-line save / restore functions expects one input argument. +; Since those are not standard call_insn's, we must avoid using +; MATCH_OPERAND for that argument. That way the register rename +; optimization will not try to rename this register. +; Each pattern is repeated for each possible register number used in +; various ABIs (r11, r1, and for some functions r12) + +(define_insn "*restore_gpregs__r11" [(match_parallel 0 "any_parallel_operand" [(clobber (match_operand:P 1 "register_operand" "=l")) (use (match_operand:P 2 "symbol_ref_operand" "s")) - (use (match_operand:P 3 "gpc_reg_operand" "r")) - (set (match_operand:P 4 "gpc_reg_operand" "=r") - (match_operand:P 5 "memory_operand" "m"))])] + (use (reg:P 11)) + (set (match_operand:P 3 "gpc_reg_operand" "=r") + (match_operand:P 4 "memory_operand" "m"))])] "" "bl %2" [(set_attr "type" "branch") (set_attr "length" "4")]) -(define_insn "*return_and_restore_gpregs_" +(define_insn "*restore_gpregs__r12" [(match_parallel 0 "any_parallel_operand" + [(clobber (match_operand:P 1 "register_operand" "=l")) + (use (match_operand:P 2 "symbol_ref_operand" "s")) + (use (reg:P 12)) + (set (match_operand:P 3 "gpc_reg_operand" "=r") + (match_operand:P 4 "memory_operand" "m"))])] + "" + "bl %2" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + +(define_insn "*restore_gpregs__r1" + [(match_parallel 0 "any_parallel_operand" + [(clobber (match_operand:P 1 "register_operand" "=l")) + (use (match_operand:P 2 "symbol_ref_operand" "s")) + (use (reg:P 1)) + (set (match_operand:P 3 "gpc_reg_operand" "=r") + (match_operand:P 4 "memory_operand" "m"))])] + "" + "bl %2" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + +(define_insn "*return_and_restore_gpregs__r11" + [(match_parallel 0 "any_parallel_operand" [(return) (clobber (match_operand:P 1 "register_operand" "=l")) (use (match_operand:P 2 "symbol_ref_operand" "s")) - (use (match_operand:P 3 "gpc_reg_operand" "r")) - (set (match_operand:P 4 "gpc_reg_operand" "=r") - (match_operand:P 5 "memory_operand" "m"))])] + (use (reg:P 11)) + (set (match_operand:P 3 "gpc_reg_operand" "=r") + (match_operand:P 4 "memory_operand" "m"))])] "" "b %2" [(set_attr "type" "branch") (set_attr "length" "4")]) -(define_insn "*return_and_restore_fpregs_" +(define_insn "*return_and_restore_gpregs__r12" [(match_parallel 0 "any_parallel_operand" [(return) (clobber (match_operand:P 1 "register_operand" "=l")) (use (match_operand:P 2 "symbol_ref_operand" "s")) - (use (match_operand:P 3 "gpc_reg_operand" "r")) - (set (match_operand:DF 4 "gpc_reg_operand" "=d") - (match_operand:DF 5 "memory_operand" "m"))])] + (use (reg:P 12)) + (set (match_operand:P 3 "gpc_reg_operand" "=r") + (match_operand:P 4 "memory_operand" "m"))])] "" "b %2" [(set_attr "type" "branch") (set_attr "length" "4")]) -(define_insn "*return_and_restore_fpregs_aix_" +(define_insn "*return_and_restore_gpregs__r1" [(match_parallel 0 "any_parallel_operand" + [(return) + (clobber (match_operand:P 1 "register_operand" "=l")) + (use (match_operand:P 2 "symbol_ref_operand" "s")) + (use (reg:P 1)) + (set (match_operand:P 3 "gpc_reg_operand" "=r") + (match_operand:P 4 "memory_operand" "m"))])] + "" + "b %2" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + +(define_insn "*return_and_restore_fpregs__r11" + [(match_parallel 0 "any_parallel_operand" + [(return) + (clobber (match_operand:P 1 "register_operand" "=l")) + (use (match_operand:P 2 "symbol_ref_operand" "s")) + (use (reg:P 11)) + (set (match_operand:DF 3 "gpc_reg_operand" "=d") + (match_operand:DF 4 "memory_operand" "m"))])] + "" + "b %2" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + +(define_insn "*return_and_restore_fpregs__r12" + [(match_parallel 0 "any_parallel_operand" + [(return) + (clobber (match_operand:P 1 "register_operand" "=l")) + (use (match_operand:P 2 "symbol_ref_operand" "s")) + (use (reg:P 12)) + (set (match_operand:DF 3 "gpc_reg_operand" "=d") + (match_operand:DF 4 "memory_operand" "m"))])] + "" + "b %2" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + +(define_insn "*return_and_restore_fpregs__r1" + [(match_parallel 0 "any_parallel_operand" + [(return) + (clobber (match_operand:P 1 "register_operand" "=l")) + (use (match_operand:P 2 "symbol_ref_operand" "s")) + (use (reg:P 1)) + (set (match_operand:DF 3 "gpc_reg_operand" "=d") + (match_operand:DF 4 "memory_operand" "m"))])] + "" + "b %2" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + +(define_insn "*return_and_restore_fpregs_aix__r11" + [(match_parallel 0 "any_parallel_operand" [(return) (use (match_operand:P 1 "register_operand" "l")) (use (match_operand:P 2 "symbol_ref_operand" "s")) - (use (match_operand:P 3 "gpc_reg_operand" "r")) - (set (match_operand:DF 4 "gpc_reg_operand" "=d") - (match_operand:DF 5 "memory_operand" "m"))])] + (use (reg:P 11)) + (set (match_operand:DF 3 "gpc_reg_operand" "=d") + (match_operand:DF 4 "memory_operand" "m"))])] "" "b %2" [(set_attr "type" "branch") (set_attr "length" "4")]) +(define_insn "*return_and_restore_fpregs_aix__r1" + [(match_parallel 0 "any_parallel_operand" + [(return) + (use (match_operand:P 1 "register_operand" "l")) + (use (match_operand:P 2 "symbol_ref_operand" "s")) + (use (reg:P 1)) + (set (match_operand:DF 3 "gpc_reg_operand" "=d") + (match_operand:DF 4 "memory_operand" "m"))])] + "" + "b %2" + [(set_attr "type" "branch") + (set_attr "length" "4")]) + ; This is used in compiling the unwind routines. (define_expand "eh_return" [(use (match_operand 0 "general_operand" ""))] diff -uN gcc-20100615-orig/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c gcc-20100615/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c --- gcc-20100615-orig/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c 1969-12-31 18:00:00.000000000 -0600 +++ gcc-20100615/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c 2010-06-15 11:50:13.463426108 -0500 @@ -0,0 +1,15 @@ +/* Test that registers used by out of line restore functions does not get renamed. + AIX, and 64 bit targets uses r1, which rnreg stays away from. + Linux 32 bits targets uses r11, which is susceptible to be renamed */ +/* { dg-do compile } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-options "-Os -frename-registers -fdump-rtl-rnreg" } */ +/* "* renamed" or "* no available better choice" results are not acceptable */ +/* { dg-final { scan-rtl-dump-not "Register 11 in insn *" "rnreg" { target powerpc*-*-linux* } } } */ +/* { dg-final { cleanup-rtl-dump "rnreg" } } */ +int +calc (int j) +{ + if (j<=1) return 1; + return calc(j-1)*(j+1); +} --------------080808000803080200070607 Content-Type: text/x-patch; name="sub_ppc_rnreg2-44.diff" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="sub_ppc_rnreg2-44.diff" Content-length: 5120 Index: gcc44-20100616/gcc/config/rs6000/rs6000.md =================================================================== --- gcc44-20100616/gcc/config/rs6000/rs6000.md (revision 160848) +++ gcc44-20100616/gcc/config/rs6000/rs6000.md (working copy) @@ -14701,13 +14701,26 @@ "{stm|stmw} %2,%1" [(set_attr "type" "store_ux")]) +; The following comment applies to: +; save_gpregs_* +; save_fpregs_* +; restore_gpregs* +; return_and_restore_gpregs* +; return_and_restore_fpregs* +; return_and_restore_fpregs_aix* +; +; The out-of-line save / restore functions expects one input argument. +; Since those are not standard call_insn's, we must avoid using +; MATCH_OPERAND for that argument. That way the register rename +; optimization will not try to rename it. + (define_insn "*save_gpregs_" [(match_parallel 0 "any_parallel_operand" [(clobber (reg:P 65)) (use (match_operand:P 1 "symbol_ref_operand" "s")) - (use (match_operand:P 2 "gpc_reg_operand" "r")) - (set (match_operand:P 3 "memory_operand" "=m") - (match_operand:P 4 "gpc_reg_operand" "r"))])] + (use (reg:P 11)) + (set (match_operand:P 2 "memory_operand" "=m") + (match_operand:P 3 "gpc_reg_operand" "r"))])] "" "bl %z1" [(set_attr "type" "branch") @@ -14717,9 +14730,9 @@ [(match_parallel 0 "any_parallel_operand" [(clobber (reg:P 65)) (use (match_operand:P 1 "symbol_ref_operand" "s")) - (use (match_operand:P 2 "gpc_reg_operand" "r")) - (set (match_operand:DF 3 "memory_operand" "=m") - (match_operand:DF 4 "gpc_reg_operand" "f"))])] + (use (reg:P 11)) + (set (match_operand:DF 2 "memory_operand" "=m") + (match_operand:DF 3 "gpc_reg_operand" "f"))])] "" "bl %z1" [(set_attr "type" "branch") @@ -14817,13 +14830,25 @@ ; FIXME: This would probably be somewhat simpler if the Cygnus sibcall ; stuff was in GCC. Oh, and "any_parallel_operand" is a bit flexible... +; The following comment applies to: +; save_gpregs_* +; save_fpregs_* +; restore_gpregs* +; return_and_restore_gpregs* +; return_and_restore_fpregs* +; +; The out-of-line save / restore functions expects one input argument. +; Since those are not standard call_insn's, we must avoid using +; MATCH_OPERAND for that argument. That way the register rename +; optimization will not try to rename it. + (define_insn "*restore_gpregs_" [(match_parallel 0 "any_parallel_operand" [(clobber (match_operand:P 1 "register_operand" "=l")) (use (match_operand:P 2 "symbol_ref_operand" "s")) - (use (match_operand:P 3 "gpc_reg_operand" "r")) - (set (match_operand:P 4 "gpc_reg_operand" "=r") - (match_operand:P 5 "memory_operand" "m"))])] + (use (reg:P 11)) + (set (match_operand:P 3 "gpc_reg_operand" "=r") + (match_operand:P 4 "memory_operand" "m"))])] "" "bl %z2" [(set_attr "type" "branch") @@ -14834,9 +14859,9 @@ [(return) (clobber (match_operand:P 1 "register_operand" "=l")) (use (match_operand:P 2 "symbol_ref_operand" "s")) - (use (match_operand:P 3 "gpc_reg_operand" "r")) - (set (match_operand:P 4 "gpc_reg_operand" "=r") - (match_operand:P 5 "memory_operand" "m"))])] + (use (reg:P 11)) + (set (match_operand:P 3 "gpc_reg_operand" "=r") + (match_operand:P 4 "memory_operand" "m"))])] "" "b %z2" [(set_attr "type" "branch") @@ -14847,9 +14872,9 @@ [(return) (clobber (match_operand:P 1 "register_operand" "=l")) (use (match_operand:P 2 "symbol_ref_operand" "s")) - (use (match_operand:P 3 "gpc_reg_operand" "r")) - (set (match_operand:DF 4 "gpc_reg_operand" "=f") - (match_operand:DF 5 "memory_operand" "m"))])] + (use (reg:P 11)) + (set (match_operand:DF 3 "gpc_reg_operand" "=f") + (match_operand:DF 4 "memory_operand" "m"))])] "" "b %z2" [(set_attr "type" "branch") diff -uN gcc-20100615-orig/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c gcc-20100615/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c --- gcc-20100615-orig/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c 1969-12-31 18:00:00.000000000 -0600 +++ gcc-20100615/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c 2010-06-15 11:50:13.463426108 -0500 @@ -0,0 +1,15 @@ +/* Test that registers used by out of line restore functions does not get renamed. + AIX, and 64 bit targets uses r1, which rnreg stays away from. + Linux 32 bits targets uses r11, which is susceptible to be renamed */ +/* { dg-do compile } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-options "-Os -frename-registers -fdump-rtl-rnreg" } */ +/* "* renamed" or "* no available better choice" results are not acceptable */ +/* { dg-final { scan-rtl-dump-not "Register 11 in insn *" "rnreg" { target powerpc*-*-linux* } } } */ +/* { dg-final { cleanup-rtl-dump "rnreg" } } */ +int +calc (int j) +{ + if (j<=1) return 1; + return calc(j-1)*(j+1); +} --------------080808000803080200070607--