Re: [patch][simplify-rtx] Fix 16-bit -> 64-bit multiply and accumulate

[Andrew Stubbs <ams@codesourcery.com>]

On 25/05/11 14:19, Joseph S. Myers wrote:
> RTL has defined abstract semantics and RTL transformations should be ones
> that are valid in accordance with those semantics, with proper assertions
> if there are additional constraints on the input passed to a function.
> This means actually counting the numbers of variable bits in the operands
> to determine whether the multiplication could overflow.

Ok, fair enough, so how can I identify a valid subreg extraction that is 
defined in terms of shifts?

The case that I care about is simple enough:

    (mult:SI (ashiftrt:SI (reg:SI rM)
                          (const_int 16))
             (sign_extend:SI (subreg:HI (reg:SI rN) 0)))

I guess that's just equivalent to this:

    (mult:SI (sign_extend:SI (subreg:HI (reg:SI rM) 4)))
             (sign_extend:SI (subreg:HI (reg:SI rN) 0)))

but it chooses not to represent it that way, which is less than helpful 
in this case.

So I could just scan for that exact pattern, or perhaps look for shift 
sizes that are half the size of the register, or some such thing, but is 
that general enough? Or is it too general again?

Is there anything else I've missed?

Andrew