* [PATCH][ARM] add support for some missing 16-bit multiplication insns
@ 2011-05-27 17:54 Andrew Stubbs
2011-06-02 15:47 ` Richard Earnshaw
0 siblings, 1 reply; 3+ messages in thread
From: Andrew Stubbs @ 2011-05-27 17:54 UTC (permalink / raw)
To: gcc-patches, patches
[-- Attachment #1: Type: text/plain, Size: 363 bytes --]
Hi all,
This patch adds support for the ARM SMLALTB, SMLALTT, SMLATB, and SMLATT
instructions.
These instructions do HImode -> DI/SImode widening
multiply-and-accumulate with one or both operands taken from the top 16
bits of the source register.
Note that this patch won't do much until my other patch for canonical
mult patterns is applied.
OK?
Andrew
[-- Attachment #2: 16-bit-ops.patch --]
[-- Type: text/x-patch, Size: 4225 bytes --]
2011-05-27 Andrew Stubbs <ams@codesourcery.com>
gcc/
* config/arm/arm.md (*maddhidi4tb, *maddhidi4tt): New define_insns.
(*maddhisi4tb, *maddhisi4tt): New define_insns.
gcc/testsuite/
* gcc.target/arm/smlatb-1.c: New file.
* gcc.target/arm/smlatt-1.c: New file.
* gcc.target/arm/smlaltb-1.c: New file.
* gcc.target/arm/smlaltt-1.c: New file.
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -1815,6 +1815,36 @@
(set_attr "predicable" "yes")]
)
+;; Note: there is no maddhisi4ibt because this one is canonical form
+(define_insn "*maddhisi4tb"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (plus:SI (mult:SI (ashiftrt:SI
+ (match_operand:SI 1 "s_register_operand" "r")
+ (const_int 16))
+ (sign_extend:SI
+ (match_operand:HI 2 "s_register_operand" "r")))
+ (match_operand:SI 3 "s_register_operand" "r")))]
+ "TARGET_DSP_MULTIPLY"
+ "smlatb%?\\t%0, %1, %2, %3"
+ [(set_attr "insn" "smlaxy")
+ (set_attr "predicable" "yes")]
+)
+
+(define_insn "*maddhisi4tt"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (plus:SI (mult:SI (ashiftrt:SI
+ (match_operand:SI 1 "s_register_operand" "r")
+ (const_int 16))
+ (ashiftrt:SI
+ (match_operand:SI 2 "s_register_operand" "r")
+ (const_int 16)))
+ (match_operand:SI 3 "s_register_operand" "r")))]
+ "TARGET_DSP_MULTIPLY"
+ "smlatt%?\\t%0, %1, %2, %3"
+ [(set_attr "insn" "smlaxy")
+ (set_attr "predicable" "yes")]
+)
+
(define_insn "*maddhidi4"
[(set (match_operand:DI 0 "s_register_operand" "=r")
(plus:DI
@@ -1828,6 +1858,39 @@
[(set_attr "insn" "smlalxy")
(set_attr "predicable" "yes")])
+;; Note: there is no maddhidi4ibt because this one is canonical form
+(define_insn "*maddhidi4tb"
+ [(set (match_operand:DI 0 "s_register_operand" "=r")
+ (plus:DI
+ (mult:DI (sign_extend:DI
+ (ashiftrt:SI
+ (match_operand:SI 1 "s_register_operand" "r")
+ (const_int 16)))
+ (sign_extend:DI
+ (match_operand:HI 2 "s_register_operand" "r")))
+ (match_operand:DI 3 "s_register_operand" "0")))]
+ "TARGET_DSP_MULTIPLY"
+ "smlaltb%?\\t%Q0, %R0, %1, %2"
+ [(set_attr "insn" "smlalxy")
+ (set_attr "predicable" "yes")])
+
+(define_insn "*maddhidi4tt"
+ [(set (match_operand:DI 0 "s_register_operand" "=r")
+ (plus:DI
+ (mult:DI (sign_extend:DI
+ (ashiftrt:SI
+ (match_operand:SI 1 "s_register_operand" "r")
+ (const_int 16)))
+ (sign_extend:DI
+ (ashiftrt:SI
+ (match_operand:SI 2 "s_register_operand" "r")
+ (const_int 16))))
+ (match_operand:DI 3 "s_register_operand" "0")))]
+ "TARGET_DSP_MULTIPLY"
+ "smlaltt%?\\t%Q0, %R0, %1, %2"
+ [(set_attr "insn" "smlalxy")
+ (set_attr "predicable" "yes")])
+
(define_expand "mulsf3"
[(set (match_operand:SF 0 "s_register_operand" "")
(mult:SF (match_operand:SF 1 "s_register_operand" "")
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/smlaltb-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv7-a" } */
+
+long long int
+foo (long long x, int in)
+{
+ short a = in & 0xffff;
+ short b = (in & 0xffff0000) >> 16;
+
+ return x + b * a;
+}
+
+/* { dg-final { scan-assembler "smlaltb" } } */
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/smlaltt-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv7-a" } */
+
+long long int
+foo (long long x, int in1, int in2)
+{
+ short a = (in1 & 0xffff0000) >> 16;
+ short b = (in2 & 0xffff0000) >> 16;
+
+ return x + b * a;
+}
+
+/* { dg-final { scan-assembler "smlaltt" } } */
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/smlatb-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv7-a" } */
+
+int
+foo (int x, int in)
+{
+ short a = in & 0xffff;
+ short b = (in & 0xffff0000) >> 16;
+
+ return x + b * a;
+}
+
+/* { dg-final { scan-assembler "smlatb" } } */
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/smlatt-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=armv7-a" } */
+
+int
+foo (int x, int in1, int in2)
+{
+ short a = (in1 & 0xffff0000) >> 16;
+ short b = (in2 & 0xffff0000) >> 16;
+
+ return x + b * a;
+}
+
+/* { dg-final { scan-assembler "smlatt" } } */
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH][ARM] add support for some missing 16-bit multiplication insns
2011-05-27 17:54 [PATCH][ARM] add support for some missing 16-bit multiplication insns Andrew Stubbs
@ 2011-06-02 15:47 ` Richard Earnshaw
2011-06-07 11:06 ` Andrew Stubbs
0 siblings, 1 reply; 3+ messages in thread
From: Richard Earnshaw @ 2011-06-02 15:47 UTC (permalink / raw)
To: Andrew Stubbs; +Cc: gcc-patches, patches
On Fri, 2011-05-27 at 17:36 +0100, Andrew Stubbs wrote:
> Hi all,
>
> This patch adds support for the ARM SMLALTB, SMLALTT, SMLATB, and SMLATT
> instructions.
>
> These instructions do HImode -> DI/SImode widening
> multiply-and-accumulate with one or both operands taken from the top 16
> bits of the source register.
>
> Note that this patch won't do much until my other patch for canonical
> mult patterns is applied.
>
> OK?
>
> Andrew
OK.
R.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH][ARM] add support for some missing 16-bit multiplication insns
2011-06-02 15:47 ` Richard Earnshaw
@ 2011-06-07 11:06 ` Andrew Stubbs
0 siblings, 0 replies; 3+ messages in thread
From: Andrew Stubbs @ 2011-06-07 11:06 UTC (permalink / raw)
To: Richard Earnshaw; +Cc: gcc-patches, patches
On 02/06/11 16:47, Richard Earnshaw wrote:
> OK.
Committed, thanks.
Andrew
^ permalink raw reply [flat|nested] 3+ messages in thread
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2011-05-27 17:54 [PATCH][ARM] add support for some missing 16-bit multiplication insns Andrew Stubbs
2011-06-02 15:47 ` Richard Earnshaw
2011-06-07 11:06 ` Andrew Stubbs
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