From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24483 invoked by alias); 7 Jun 2011 20:54:06 -0000 Received: (qmail 24475 invoked by uid 22791); 7 Jun 2011 20:54:05 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 07 Jun 2011 20:53:50 +0000 Received: (qmail 2878 invoked from network); 7 Jun 2011 20:53:49 -0000 Received: from unknown (HELO ?192.168.1.5?) (janisjo@127.0.0.2) by mail.codesourcery.com with ESMTPA; 7 Jun 2011 20:53:49 -0000 Message-ID: <4DEE8FE7.50001@codesourcery.com> Date: Tue, 07 Jun 2011 21:12:00 -0000 From: Janis Johnson User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.17) Gecko/20110424 Thunderbird/3.1.10 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org Subject: [testsuite] skip ARM tests with conflicting options Content-Type: multipart/mixed; boundary="------------040903000905020307050406" X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-06/txt/msg00581.txt.bz2 This is a multi-part message in MIME format. --------------040903000905020307050406 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-length: 564 Several tests in gcc.target/arm use dg-options with -mcpu=xxxx, which causes compiler warnings or errors when the multilib flags include -march=yyyy. This patch causes those tests to be skipped. It also prevents gcc.target/arm/20090811-1.c from running with multilibs that would override -mcpu or -mfloat-abi options specified for the test. Tested on arm-none-linux-gnueabi for several multilibs; these tests are compile-only so it didn't matter that I didn't have runtime support for them. OK for trunk and 4.6 branch? (This is just the tip of the iceberg.) --------------040903000905020307050406 Content-Type: text/plain; name="gcc-20110607-1" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="gcc-20110607-1" Content-length: 3515 2011-06-07 Janis Johnson * gcc.target/arm/20090811-1.c: Skip for incompatible options, do not override other options. * gcc.target/arm/combine-cmp-shift.c: Skip for incompatible options. * gcc.target/arm/pr45094.c: Likewise. * gcc.target/arm/scd42-1.c: Likewise. * gcc.target/arm/scd42-3.c: Likewise. * gcc.target/arm/thumb-ltu.c: Likewise. Index: gcc/testsuite/gcc.target/arm/20090811-1.c =================================================================== --- gcc/testsuite/gcc.target/arm/20090811-1.c (revision 174706) +++ gcc/testsuite/gcc.target/arm/20090811-1.c (working copy) @@ -1,4 +1,7 @@ /* { dg-do compile } */ +/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */ +/* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=cortex-a8" } } */ +/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */ /* { dg-options "-O3 -mcpu=cortex-a8 -mfpu=vfp3 -mfloat-abi=softfp" } */ typedef struct cb Index: gcc/testsuite/gcc.target/arm/combine-cmp-shift.c =================================================================== --- gcc/testsuite/gcc.target/arm/combine-cmp-shift.c (revision 174706) +++ gcc/testsuite/gcc.target/arm/combine-cmp-shift.c (working copy) @@ -1,3 +1,4 @@ +/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */ /* { dg-options "-O2 -mcpu=cortex-a8" } */ /* { dg-final { scan-assembler "cmp\tr\[0-9\]*, r\[0-9\]*, asr #31" } } */ Index: gcc/testsuite/gcc.target/arm/pr45094.c =================================================================== --- gcc/testsuite/gcc.target/arm/pr45094.c (revision 174706) +++ gcc/testsuite/gcc.target/arm/pr45094.c (working copy) @@ -1,4 +1,5 @@ /* { dg-do run } */ +/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */ /* { dg-require-effective-target arm_neon_hw } */ /* { dg-options "-O2 -mcpu=cortex-a8" } */ /* { dg-add-options arm_neon } */ Index: gcc/testsuite/gcc.target/arm/scd42-1.c =================================================================== --- gcc/testsuite/gcc.target/arm/scd42-1.c (revision 174706) +++ gcc/testsuite/gcc.target/arm/scd42-1.c (working copy) @@ -1,5 +1,6 @@ /* Verify that mov is preferred on XScale for loading a 1 byte constant. */ /* { dg-do compile } */ +/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */ /* { dg-options "-mcpu=xscale -O" } */ unsigned load1(void) __attribute__ ((naked)); Index: gcc/testsuite/gcc.target/arm/scd42-3.c =================================================================== --- gcc/testsuite/gcc.target/arm/scd42-3.c (revision 174706) +++ gcc/testsuite/gcc.target/arm/scd42-3.c (working copy) @@ -1,5 +1,6 @@ /* Verify that ldr is preferred on XScale for loading a 3 or 4 byte constant. */ /* { dg-do compile } */ +/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */ /* { dg-options "-mcpu=xscale -O" } */ unsigned load4(void) __attribute__ ((naked)); Index: gcc/testsuite/gcc.target/arm/thumb-ltu.c =================================================================== --- gcc/testsuite/gcc.target/arm/thumb-ltu.c (revision 174706) +++ gcc/testsuite/gcc.target/arm/thumb-ltu.c (working copy) @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */ /* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */ void f(unsigned a, unsigned b, unsigned c, unsigned d) --------------040903000905020307050406--