* machmode.h (HWI_COMPUTABLE_MODE_P): New macro. * combine.c (set_nonzero_bits_and_sign_copies): Use it. (find_split-point, combine_simplify_rtx, simplify_if_then_else, simplify_set, simplify_logical, expand_compound_operation, make_extraction, force_to_mode, if_then_else_cond, extended_count, try_widen_shift_mode, simplify_shift_const_1, simplify_comparison, record_value_for_reg): Likewise. * expmed.c (expand_widening_mult, expand_mult_highpart): Likewise. * simplify-rtx. c (simplify_unary_operation_1, simplify_binary_operation_1, simplify_const_relational_operation): Likewise. Index: baseline-trunk/gcc/combine.c =================================================================== --- baseline-trunk.orig/gcc/combine.c +++ baseline-trunk/gcc/combine.c @@ -1560,7 +1560,7 @@ set_nonzero_bits_and_sign_copies (rtx x, say what its contents were. */ && ! REGNO_REG_SET_P (DF_LR_IN (ENTRY_BLOCK_PTR->next_bb), REGNO (x)) - && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT) + && HWI_COMPUTABLE_MODE_P (GET_MODE (x))) { reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, REGNO (x)); @@ -4679,8 +4679,7 @@ find_split_point (rtx *loc, rtx insn, bo /* See if this is a bitfield assignment with everything constant. If so, this is an IOR of an AND, so split it into that. */ if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT - && (GET_MODE_BITSIZE (GET_MODE (XEXP (SET_DEST (x), 0))) - <= HOST_BITS_PER_WIDE_INT) + && HWI_COMPUTABLE_MODE_P (GET_MODE (XEXP (SET_DEST (x), 0))) && CONST_INT_P (XEXP (SET_DEST (x), 1)) && CONST_INT_P (XEXP (SET_DEST (x), 2)) && CONST_INT_P (SET_SRC (x)) @@ -5584,7 +5583,7 @@ combine_simplify_rtx (rtx x, enum machin if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) break; - if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) + if (HWI_COMPUTABLE_MODE_P (mode)) SUBST (XEXP (x, 0), force_to_mode (XEXP (x, 0), GET_MODE (XEXP (x, 0)), GET_MODE_MASK (mode), 0)); @@ -5596,7 +5595,7 @@ combine_simplify_rtx (rtx x, enum machin /* Similarly to what we do in simplify-rtx.c, a truncate of a register whose value is a comparison can be replaced with a subreg if STORE_FLAG_VALUE permits. */ - if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + if (HWI_COMPUTABLE_MODE_P (mode) && (STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0 && (temp = get_last_value (XEXP (x, 0))) && COMPARISON_P (temp)) @@ -5634,7 +5633,7 @@ combine_simplify_rtx (rtx x, enum machin && INTVAL (XEXP (x, 1)) == -INTVAL (XEXP (XEXP (x, 0), 1)) && ((i = exact_log2 (UINTVAL (XEXP (XEXP (x, 0), 1)))) >= 0 || (i = exact_log2 (UINTVAL (XEXP (x, 1)))) >= 0) - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (mode) && ((GET_CODE (XEXP (XEXP (x, 0), 0)) == AND && CONST_INT_P (XEXP (XEXP (XEXP (x, 0), 0), 1)) && (UINTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1)) @@ -5669,7 +5668,7 @@ combine_simplify_rtx (rtx x, enum machin for example in cases like ((a & 1) + (a & 2)), which can become a & 3. */ - if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + if (HWI_COMPUTABLE_MODE_P (mode) && (nonzero_bits (XEXP (x, 0), mode) & nonzero_bits (XEXP (x, 1), mode)) == 0) { @@ -5875,7 +5874,7 @@ combine_simplify_rtx (rtx x, enum machin AND with STORE_FLAG_VALUE when we are done, since we are only going to test the sign bit. */ if (new_code == NE && GET_MODE_CLASS (mode) == MODE_INT - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (mode) && val_signbit_p (mode, STORE_FLAG_VALUE) && op1 == const0_rtx && mode == GET_MODE (op0) @@ -6209,7 +6208,7 @@ simplify_if_then_else (rtx x) || GET_CODE (XEXP (t, 0)) == LSHIFTRT || GET_CODE (XEXP (t, 0)) == ASHIFTRT) && GET_CODE (XEXP (XEXP (t, 0), 0)) == SUBREG - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (mode) && subreg_lowpart_p (XEXP (XEXP (t, 0), 0)) && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 0)), f) && ((nonzero_bits (f, GET_MODE (f)) @@ -6225,7 +6224,7 @@ simplify_if_then_else (rtx x) || GET_CODE (XEXP (t, 0)) == IOR || GET_CODE (XEXP (t, 0)) == XOR) && GET_CODE (XEXP (XEXP (t, 0), 1)) == SUBREG - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (mode) && subreg_lowpart_p (XEXP (XEXP (t, 0), 1)) && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 1)), f) && ((nonzero_bits (f, GET_MODE (f)) @@ -6303,8 +6302,7 @@ simplify_set (rtx x) simplify the expression for the object knowing that we only need the low-order bits. */ - if (GET_MODE_CLASS (mode) == MODE_INT - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) + if (GET_MODE_CLASS (mode) == MODE_INT && HWI_COMPUTABLE_MODE_P (mode)) { src = force_to_mode (src, mode, ~(unsigned HOST_WIDE_INT) 0, 0); SUBST (SET_SRC (x), src); @@ -6439,7 +6437,7 @@ simplify_set (rtx x) if (((old_code == NE && new_code == EQ) || (old_code == EQ && new_code == NE)) && ! other_changed_previously && op1 == const0_rtx - && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (GET_MODE (op0)) && exact_log2 (mask = nonzero_bits (op0, GET_MODE (op0))) >= 0) { rtx pat = PATTERN (other_insn), note = 0; @@ -6652,7 +6650,7 @@ simplify_logical (rtx x) any (sign) bits when converting INTVAL (op1) to "unsigned HOST_WIDE_INT". */ if (CONST_INT_P (op1) - && (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && (HWI_COMPUTABLE_MODE_P (mode) || INTVAL (op1) > 0)) { x = simplify_and_const_int (x, mode, op0, INTVAL (op1)); @@ -6810,7 +6808,7 @@ expand_compound_operation (rtx x) bit is not set, as this is easier to optimize. It will be converted back to cheaper alternative in make_extraction. */ if (GET_CODE (x) == SIGN_EXTEND - && (GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT + && (HWI_COMPUTABLE_MODE_P (GET_MODE (x)) && ((nonzero_bits (XEXP (x, 0), GET_MODE (XEXP (x, 0))) & ~(((unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (XEXP (x, 0)))) @@ -6839,7 +6837,7 @@ expand_compound_operation (rtx x) set. */ if (GET_CODE (XEXP (x, 0)) == TRUNCATE && GET_MODE (XEXP (XEXP (x, 0), 0)) == GET_MODE (x) - && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (GET_MODE (x)) && (nonzero_bits (XEXP (XEXP (x, 0), 0), GET_MODE (x)) & ~GET_MODE_MASK (GET_MODE (XEXP (x, 0)))) == 0) return XEXP (XEXP (x, 0), 0); @@ -6848,7 +6846,7 @@ expand_compound_operation (rtx x) if (GET_CODE (XEXP (x, 0)) == SUBREG && GET_MODE (SUBREG_REG (XEXP (x, 0))) == GET_MODE (x) && subreg_lowpart_p (XEXP (x, 0)) - && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (GET_MODE (x)) && (nonzero_bits (SUBREG_REG (XEXP (x, 0)), GET_MODE (x)) & ~GET_MODE_MASK (GET_MODE (XEXP (x, 0)))) == 0) return SUBREG_REG (XEXP (x, 0)); @@ -7237,11 +7235,9 @@ make_extraction (enum machine_mode mode, bit is not set, convert the extraction to the cheaper of sign and zero extension, that are equivalent in these cases. */ if (flag_expensive_optimizations - && (GET_MODE_BITSIZE (tmode) <= HOST_BITS_PER_WIDE_INT + && (HWI_COMPUTABLE_MODE_P (tmode) && ((nonzero_bits (new_rtx, tmode) - & ~(((unsigned HOST_WIDE_INT) - GET_MODE_MASK (tmode)) - >> 1)) + & ~(((unsigned HOST_WIDE_INT)GET_MODE_MASK (tmode)) >> 1)) == 0))) { rtx temp = gen_rtx_ZERO_EXTEND (mode, new_rtx); @@ -7440,7 +7436,7 @@ make_extraction (enum machine_mode mode, SIGN_EXTENSION or ZERO_EXTENSION, that are equivalent in these cases. */ if (flag_expensive_optimizations - && (GET_MODE_BITSIZE (GET_MODE (pos_rtx)) <= HOST_BITS_PER_WIDE_INT + && (HWI_COMPUTABLE_MODE_P (GET_MODE (pos_rtx)) && ((nonzero_bits (pos_rtx, GET_MODE (pos_rtx)) & ~(((unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (pos_rtx))) @@ -8202,7 +8198,7 @@ force_to_mode (rtx x, enum machine_mode if (GET_CODE (x) == AND && CONST_INT_P (XEXP (x, 1)) && GET_MODE_MASK (GET_MODE (x)) != mask - && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT) + && HWI_COMPUTABLE_MODE_P (GET_MODE (x))) { unsigned HOST_WIDE_INT cval = UINTVAL (XEXP (x, 1)) @@ -8360,7 +8356,7 @@ force_to_mode (rtx x, enum machine_mode if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0 && INTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (op_mode) - && GET_MODE_BITSIZE (op_mode) <= HOST_BITS_PER_WIDE_INT) + && HWI_COMPUTABLE_MODE_P (op_mode)) mask >>= INTVAL (XEXP (x, 1)); else mask = fuller_mask; @@ -8380,7 +8376,7 @@ force_to_mode (rtx x, enum machine_mode if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT - && GET_MODE_BITSIZE (op_mode) <= HOST_BITS_PER_WIDE_INT) + && HWI_COMPUTABLE_MODE_P (op_mode)) { rtx inner = XEXP (x, 0); unsigned HOST_WIDE_INT inner_mask; @@ -8810,8 +8806,7 @@ if_then_else_cond (rtx x, rtx *ptrue, rt } /* Likewise for 0 or a single bit. */ - else if (SCALAR_INT_MODE_P (mode) - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + else if (HWI_COMPUTABLE_MODE_P (mode) && exact_log2 (nz = nonzero_bits (x, mode)) >= 0) { *ptrue = gen_int_mode (nz, mode), *pfalse = const0_rtx; @@ -9650,7 +9645,7 @@ extended_count (const_rtx x, enum machin return 0; return (unsignedp - ? (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + ? (HWI_COMPUTABLE_MODE_P (mode) ? (unsigned int) (GET_MODE_BITSIZE (mode) - 1 - floor_log2 (nonzero_bits (x, mode))) : 0) @@ -9818,7 +9813,7 @@ try_widen_shift_mode (enum rtx_code code case LSHIFTRT: /* Similarly here but with zero bits. */ - if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + if (HWI_COMPUTABLE_MODE_P (mode) && (nonzero_bits (op, mode) & ~GET_MODE_MASK (orig_mode)) == 0) return mode; @@ -9968,10 +9963,10 @@ simplify_shift_const_1 (enum rtx_code co code = LSHIFTRT; if (((code == LSHIFTRT - && GET_MODE_BITSIZE (shift_mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (shift_mode) && !(nonzero_bits (varop, shift_mode) >> count)) || (code == ASHIFT - && GET_MODE_BITSIZE (shift_mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (shift_mode) && !((nonzero_bits (varop, shift_mode) << count) & GET_MODE_MASK (shift_mode)))) && !side_effects_p (varop)) @@ -10087,8 +10082,8 @@ simplify_shift_const_1 (enum rtx_code co if (CONST_INT_P (XEXP (varop, 1)) && INTVAL (XEXP (varop, 1)) >= 0 && INTVAL (XEXP (varop, 1)) < GET_MODE_BITSIZE (GET_MODE (varop)) - && GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (result_mode) + && HWI_COMPUTABLE_MODE_P (mode) && !VECTOR_MODE_P (result_mode)) { enum rtx_code first_code = GET_CODE (varop); @@ -10329,7 +10324,7 @@ simplify_shift_const_1 (enum rtx_code co && XEXP (varop, 1) == const0_rtx && GET_MODE (XEXP (varop, 0)) == result_mode && count == (GET_MODE_BITSIZE (result_mode) - 1) - && GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (result_mode) && STORE_FLAG_VALUE == -1 && nonzero_bits (XEXP (varop, 0), result_mode) == 1 && merge_outer_ops (&outer_op, &outer_const, XOR, 1, result_mode, @@ -10397,7 +10392,7 @@ simplify_shift_const_1 (enum rtx_code co } else if ((code == ASHIFTRT || code == LSHIFTRT) && count < HOST_BITS_PER_WIDE_INT - && GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (result_mode) && 0 == (nonzero_bits (XEXP (varop, 0), result_mode) >> count) && 0 == (nonzero_bits (XEXP (varop, 0), result_mode) @@ -11079,7 +11074,7 @@ simplify_comparison (enum rtx_code code, this shift are known to be zero for both inputs and if the type of comparison is compatible with the shift. */ if (GET_CODE (op0) == GET_CODE (op1) - && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (GET_MODE(op0)) && ((GET_CODE (op0) == ROTATE && (code == NE || code == EQ)) || ((GET_CODE (op0) == LSHIFTRT || GET_CODE (op0) == ASHIFT) && (code != GT && code != LT && code != GE && code != LE)) @@ -11228,8 +11223,7 @@ simplify_comparison (enum rtx_code code, /* If this is a sign bit comparison and we can do arithmetic in MODE, say that we will only be needing the sign bit of OP0. */ - if (sign_bit_comparison_p - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) + if (sign_bit_comparison_p && HWI_COMPUTABLE_MODE_P (mode)) op0 = force_to_mode (op0, mode, (unsigned HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (mode) - 1), @@ -11476,7 +11470,7 @@ simplify_comparison (enum rtx_code code, mode = GET_MODE (XEXP (op0, 0)); if (mode != VOIDmode && GET_MODE_CLASS (mode) == MODE_INT && (unsigned_comparison_p || equality_comparison_p) - && (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) + && HWI_COMPUTABLE_MODE_P (mode) && ((unsigned HOST_WIDE_INT) const_op < GET_MODE_MASK (mode)) && have_insn_for (COMPARE, mode)) { @@ -11721,7 +11715,7 @@ simplify_comparison (enum rtx_code code, && subreg_lowpart_p (XEXP (op0, 0)))) && CONST_INT_P (XEXP (op0, 1)) && mode_width <= HOST_BITS_PER_WIDE_INT - && GET_MODE_BITSIZE (tmode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (tmode) && ((c1 = INTVAL (XEXP (op0, 1))) & ~mask) == 0 && (c1 & ~GET_MODE_MASK (tmode)) == 0 && c1 != mask @@ -11760,7 +11754,7 @@ simplify_comparison (enum rtx_code code, || (GET_CODE (shift_op) == XOR && CONST_INT_P (XEXP (shift_op, 1)) && CONST_INT_P (shift_count) - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (mode) && (UINTVAL (XEXP (shift_op, 1)) == (unsigned HOST_WIDE_INT) 1 << INTVAL (shift_count)))) @@ -12009,8 +12003,7 @@ simplify_comparison (enum rtx_code code, && GET_MODE_SIZE (mode) < UNITS_PER_WORD && ! have_insn_for (COMPARE, mode)) for (tmode = GET_MODE_WIDER_MODE (mode); - (tmode != VOIDmode - && GET_MODE_BITSIZE (tmode) <= HOST_BITS_PER_WIDE_INT); + (tmode != VOIDmode && HWI_COMPUTABLE_MODE_P (tmode)); tmode = GET_MODE_WIDER_MODE (tmode)) if (have_insn_for (COMPARE, tmode)) { @@ -12021,7 +12014,7 @@ simplify_comparison (enum rtx_code code, a paradoxical subreg to extend OP0. */ if (op1 == const0_rtx && (code == LT || code == GE) - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) + && HWI_COMPUTABLE_MODE_P (mode)) { op0 = simplify_gen_binary (AND, tmode, gen_lowpart (tmode, op0), @@ -12313,7 +12306,7 @@ record_value_for_reg (rtx reg, rtx insn, subst_low_luid = DF_INSN_LUID (insn); rsp->last_set_mode = mode; if (GET_MODE_CLASS (mode) == MODE_INT - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) + && HWI_COMPUTABLE_MODE_P (mode)) mode = nonzero_bits_mode; rsp->last_set_nonzero_bits = nonzero_bits (value, mode); rsp->last_set_sign_bit_copies Index: baseline-trunk/gcc/expmed.c =================================================================== --- baseline-trunk.orig/gcc/expmed.c +++ baseline-trunk/gcc/expmed.c @@ -3112,7 +3112,7 @@ expand_widening_mult (enum machine_mode this_optab == umul_widen_optab)) && CONST_INT_P (cop1) && (INTVAL (cop1) >= 0 - || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)) + || HWI_COMPUTABLE_MODE_P (mode))) { HOST_WIDE_INT coeff = INTVAL (cop1); int max_cost; @@ -3459,7 +3459,7 @@ expand_mult_highpart (enum machine_mode gcc_assert (!SCALAR_FLOAT_MODE_P (mode)); /* We can't support modes wider than HOST_BITS_PER_INT. */ - gcc_assert (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT); + gcc_assert (HWI_COMPUTABLE_MODE_P (mode)); cnst1 = INTVAL (op1) & GET_MODE_MASK (mode); Index: baseline-trunk/gcc/machmode.h =================================================================== --- baseline-trunk.orig/gcc/machmode.h +++ baseline-trunk/gcc/machmode.h @@ -279,4 +279,8 @@ extern void init_adjust_machine_modes (v TRULY_NOOP_TRUNCATION (GET_MODE_PRECISION (MODE1), \ GET_MODE_PRECISION (MODE2)) +#define HWI_COMPUTABLE_MODE_P(MODE) \ + (SCALAR_INT_MODE_P (MODE) \ + && GET_MODE_PRECISION (MODE) <= HOST_BITS_PER_WIDE_INT) + #endif /* not HAVE_MACHINE_MODES */ Index: baseline-trunk/gcc/simplify-rtx.c =================================================================== --- baseline-trunk.orig/gcc/simplify-rtx.c +++ baseline-trunk/gcc/simplify-rtx.c @@ -865,7 +865,7 @@ simplify_unary_operation_1 (enum rtx_cod STORE_FLAG_VALUE permits. This is like the previous test, but it works even if the comparison is done in a mode larger than HOST_BITS_PER_WIDE_INT. */ - if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + if (HWI_COMPUTABLE_MODE_P (mode) && COMPARISON_P (op) && (STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0) return rtl_hooks.gen_lowpart_no_emit (mode, op); @@ -2424,7 +2424,7 @@ simplify_binary_operation_1 (enum rtx_co /* (ior A C) is C if all bits of A that might be nonzero are on in C. */ if (CONST_INT_P (op1) - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (mode) && (nonzero_bits (op0, mode) & ~UINTVAL (op1)) == 0) return op1; @@ -2509,7 +2509,7 @@ simplify_binary_operation_1 (enum rtx_co /* If we have (ior (and (X C1) C2)), simplify this by making C1 as small as possible if C1 actually changes. */ if (CONST_INT_P (op1) - && (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && (HWI_COMPUTABLE_MODE_P (mode) || INTVAL (op1) > 0) && GET_CODE (op0) == AND && CONST_INT_P (XEXP (op0, 1)) @@ -2580,7 +2580,7 @@ simplify_binary_operation_1 (enum rtx_co convert them into an IOR. This helps to detect rotation encoded using those methods and possibly other simplifications. */ - if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + if (HWI_COMPUTABLE_MODE_P (mode) && (nonzero_bits (op0, mode) & nonzero_bits (op1, mode)) == 0) return (simplify_gen_binary (IOR, mode, op0, op1)); @@ -2699,7 +2699,7 @@ simplify_binary_operation_1 (enum rtx_co case AND: if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0)) return trueop1; - if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) + if (HWI_COMPUTABLE_MODE_P (mode)) { HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode); HOST_WIDE_INT nzop1; @@ -2732,7 +2732,7 @@ simplify_binary_operation_1 (enum rtx_co if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND) && CONST_INT_P (trueop1) - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (mode) && (~GET_MODE_MASK (GET_MODE (XEXP (op0, 0))) & UINTVAL (trueop1)) == 0) { @@ -2814,7 +2814,7 @@ simplify_binary_operation_1 (enum rtx_co Also, if (N & M) == 0, then (A +- N) & M -> A & M. */ if (CONST_INT_P (trueop1) - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && HWI_COMPUTABLE_MODE_P (mode) && ~UINTVAL (trueop1) && (UINTVAL (trueop1) & (UINTVAL (trueop1) + 1)) == 0 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS)) @@ -4659,8 +4659,7 @@ simplify_const_relational_operation (enu } /* Optimize comparisons with upper and lower bounds. */ - if (SCALAR_INT_MODE_P (mode) - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + if (HWI_COMPUTABLE_MODE_P (mode) && CONST_INT_P (trueop1)) { int sign;