For loading a 32-bit constant in a register, there is room for
improvement:

* SF can be handled the same way as SI and therefore the patch
  adds a peep2 to produce a *reload_insf analogon to *reload_insi.

* If the destination register overlaps NO_LD_REGS, values already
  loaded into some other byte can be reused by a simple MOV.
  This is helpful then moving values like, e.g. -2, -100 etc. because
  all high bytes are 0xff.

* 0.0f can be directly moved to memory.

* The mov insns contain "!d" constraint. I see no reason to make "d"
  expensive and discourage use of d-regs.  A "*d" to hide is better
  because it does it neither puts additional pressure on "d" nor
  discourages "d".

The patch is basically a rewrite of output_reload_insisf.

Tested without regressions.

Ok to commit?

Johann

	* config/avr/avr.md (*reload_insi): Change predicate #1 to
	const_int_operand.  Ditto for peep2 producing this insn.
	Add argument to output_reload_insisf call.
	(*movsi,*movsf): Add argument to output_movsisf call.  Change "!d"
	constraint to "*d".
	(*reload_insf): New insn and new peep2 to produce it.
	* config/avr/avr-protos.h (output_movsisf): Change prototype.
	(output_reload_insisf): Change prototype.
	* config/avr/avr.c (avr_asm_len): New function.
	(output_reload_insisf): Rewrite.
	(output_movsisf): Change prototype.  output_reload_insisf for
	all CONST_INT and CONST_DOUBLE.  ALlow moving 0.0f to memory.
	(adjust_insn_length): Add argument to output_movsisf and
	output_reload_insisf call.