From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28628 invoked by alias); 7 Sep 2011 19:25:58 -0000 Received: (qmail 28592 invoked by uid 22791); 7 Sep 2011 19:25:57 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=BAYES_00,TW_CP X-Spam-Check-By: sourceware.org Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 07 Sep 2011 19:25:42 +0000 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=EU1-MAIL.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1R1Nkj-0003tn-A5 from Bernd_Schmidt@mentor.com ; Wed, 07 Sep 2011 12:25:41 -0700 Received: from [127.0.0.1] ([172.16.63.104]) by EU1-MAIL.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.1830); Wed, 7 Sep 2011 20:25:39 +0100 Message-ID: <4E67C4B8.7070703@codesourcery.com> Date: Wed, 07 Sep 2011 19:36:00 -0000 From: Bernd Schmidt User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.20) Gecko/20110905 Lightning/1.0b3pre Thunderbird/3.1.12 MIME-Version: 1.0 To: Ramana Radhakrishnan CC: GCC Patches Subject: Re: ARM: Emit conditions in push_multi References: <4E5F71A1.4050207@codesourcery.com> <4E60C110.4030407@codesourcery.com> In-Reply-To: Content-Type: multipart/mixed; boundary="------------070102040700080200080809" Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2011-09/txt/msg00524.txt.bz2 This is a multi-part message in MIME format. --------------070102040700080200080809 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-length: 1175 On 09/07/11 10:28, Ramana Radhakrishnan wrote: > On 2 September 2011 12:42, Bernd Schmidt wrote: >> On 09/02/11 12:35, Ramana Radhakrishnan wrote: >>> On 1 September 2011 12:50, Bernd Schmidt wrote: >>>> Shrink-wrapping tests on ARM had one additional failure, which I could >>>> track down to a stmfd instruction being emitted where an stmhifd was >>>> intended. The following patch fixes the testcase; full tests running >>>> now. Ok? >>> >>> IIUC this should have been a result of conditionalizing the prologue >>> saves by the CCFSM state machine in ARM state >> >> Correct. >> >>> given that the push >>> instruction below doesn't have the conditional markers. >> >> Although I'm not sure how you arrived at this? Thumb insns can't be >> conditional anyway? > > IT blocks in Thumb2 and the predicable attribute means we can generate > some amount of conditional instruction in T2 state. Oh, and the insns are output as conditional in addition to the it instruction - half a year of hardly doing anything with ARM and I'd forgotten about this :( New patch below. Tested on arm-eabi sim with a few multilibs. Bernd --------------070102040700080200080809 Content-Type: text/plain; name="arm-multi2.diff" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="arm-multi2.diff" Content-length: 1658 * config/arm/arm.md (push_multi): Emit predicates. (push_fp_multi): Likewise. * config/arm/arm.c (vfp_output_fstmd): Likewise. Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c (revision 178596) +++ gcc/config/arm/arm.c (working copy) @@ -13084,7 +13084,7 @@ vfp_output_fstmd (rtx * operands) int base; int i; - strcpy (pattern, "fstmfdd\t%m0!, {%P1"); + strcpy (pattern, "fstmfdd%?\t%m0!, {%P1"); p = strlen (pattern); gcc_assert (GET_CODE (operands[1]) == REG); Index: gcc/config/arm/arm.md =================================================================== --- gcc/config/arm/arm.md (revision 178596) +++ gcc/config/arm/arm.md (working copy) @@ -10581,14 +10581,16 @@ (define_insn "*push_multi" In Thumb mode always use push, and the assembler will pick something appropriate. */ if (num_saves == 1 && TARGET_ARM) - output_asm_insn (\"str\\t%1, [%m0, #-4]!\", operands); + output_asm_insn (\"str%?\\t%1, [%m0, #-4]!\", operands); else { int i; char pattern[100]; if (TARGET_ARM) - strcpy (pattern, \"stmfd\\t%m0!, {%1\"); + strcpy (pattern, \"stm%(fd%)\\t%m0!, {%1\"); + else if (TARGET_THUMB2) + strcpy (pattern, \"push%?\\t{%1\"); else strcpy (pattern, \"push\\t{%1\"); @@ -10631,7 +10633,7 @@ (define_insn "*push_fp_multi" { char pattern[100]; - sprintf (pattern, \"sfmfd\\t%%1, %d, [%%m0]!\", XVECLEN (operands[2], 0)); + sprintf (pattern, \"sfm%(fd%)\\t%%1, %d, [%%m0]!\", XVECLEN (operands[2], 0)); output_asm_insn (pattern, operands); return \"\"; }" --------------070102040700080200080809--