* RE: [x86][patch] Add -march=cannonlake. @ 2017-11-08 8:08 Koval, Julia 2017-11-08 19:51 ` Uros Bizjak 0 siblings, 1 reply; 7+ messages in thread From: Koval, Julia @ 2017-11-08 8:08 UTC (permalink / raw) To: 'GCC Patches'; +Cc: Uros Bizjak, 'Kirill Yukhin' [-- Attachment #1: Type: text/plain, Size: 1263 bytes --] Attachment got lost. > -----Original Message----- > From: Koval, Julia > Sent: Wednesday, November 08, 2017 9:01 AM > To: 'GCC Patches' <gcc-patches@gcc.gnu.org> > Cc: 'Uros Bizjak' <ubizjak@gmail.com>; 'Kirill Yukhin' <kirill.yukhin@gmail.com> > Subject: RE: [x86][patch] Add -march=cannonlake. > > Hi, this patch adds new option -march=cannonlake. Isasets defined in: > https://software.intel.com/sites/default/files/managed/c5/15/architecture- > instruction-set-extensions-programming-reference.pdf > > Ok for trunk? > > gcc/ > * config.gcc: Add -march=cannonlake. > * config/i386/driver-i386.c (host_detect_local_cpu): Detect cannonlake. > * config/i386/i386-c.c (ix86_target_macros_internal): Handle > cannonlake. > * config/i386/i386.c (processor_costs): Add m_CANNONLAKE. > (PTA_CANNONLAKE): New. > (processor_target_table): Add cannonlake. > (ix86_option_override_internal): Ditto. > (fold_builtin_cpu): Ditto. > (get_builtin_code_for_version): Handle cannonlake. > (M_INTEL_CANNONLAKE): New. > * config/i386/i386.h (TARGET_CANNONLAKE, > PROCESSOR_CANNONLAKE): New. > * doc/invoke.texi: Add -march=cannonlake. > gcc/testsuite/ > * gcc.target/i386/funcspec-56.inc: Handle new march. > > Thanks, > Julia [-- Attachment #2: 0001-cannonlake.patch --] [-- Type: application/octet-stream, Size: 8448 bytes --] From 4168159fa0813005872c9823e5f70b0e0585843b Mon Sep 17 00:00:00 2001 From: julia <jkoval@gkticlel801.igk.intel.com> Date: Tue, 7 Nov 2017 19:10:25 +0300 Subject: [PATCH] cannonlake --- gcc/config.gcc | 2 +- gcc/config/i386/driver-i386.c | 4 +++- gcc/config/i386/i386-c.c | 7 +++++++ gcc/config/i386/i386.c | 13 +++++++++++-- gcc/config/i386/i386.h | 2 ++ gcc/doc/invoke.texi | 7 +++++++ gcc/testsuite/gcc.target/i386/funcspec-56.inc | 1 + 7 files changed, 32 insertions(+), 4 deletions(-) diff --git a/gcc/config.gcc b/gcc/config.gcc index 3dace85..1247702 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -629,7 +629,7 @@ x86_64_archs="amdfam10 athlon64 athlon64-sse3 barcelona bdver1 bdver2 \ bdver3 bdver4 znver1 btver1 btver2 k8 k8-sse3 opteron opteron-sse3 nocona \ core2 corei7 corei7-avx core-avx-i core-avx2 atom slm nehalem westmere \ sandybridge ivybridge haswell broadwell bonnell silvermont knl knm \ -skylake-avx512 x86-64 native" +skylake-avx512 cannonlake x86-64 native" # Additional x86 processors supported by --with-cpu=. Each processor # MUST be separated by exactly one space. diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index 8028399..789696a 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -803,9 +803,11 @@ const char *host_detect_local_cpu (int argc, const char **argv) default: if (arch) { + if (has_avx512vbmi) + cpu = "cannonlake"; /* This is unknown family 0x6 CPU. */ /* Assume Knights Landing. */ - if (has_avx512f) + else if (has_avx512f) cpu = "knl"; /* Assume Knights Mill */ else if (has_avx5124vnniw) diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c index 7f88bef..a8deb10 100644 --- a/gcc/config/i386/i386-c.c +++ b/gcc/config/i386/i386-c.c @@ -184,6 +184,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__skylake_avx512"); def_or_undef (parse_in, "__skylake_avx512__"); break; + case PROCESSOR_CANNONLAKE: + def_or_undef (parse_in, "__cannonlake"); + def_or_undef (parse_in, "__cannonlake__"); + break; /* use PROCESSOR_max to not set/unset the arch macro. */ case PROCESSOR_max: break; @@ -302,6 +306,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, case PROCESSOR_SKYLAKE_AVX512: def_or_undef (parse_in, "__tune_skylake_avx512__"); break; + case PROCESSOR_CANNONLAKE: + def_or_undef (parse_in, "__tune_cannonlake__"); + break; case PROCESSOR_LAKEMONT: def_or_undef (parse_in, "__tune_lakemont__"); break; diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 1e2709d..6885626 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -142,6 +142,7 @@ const struct processor_costs *ix86_cost = NULL; #define m_KNL (1U<<PROCESSOR_KNL) #define m_KNM (1U<<PROCESSOR_KNM) #define m_SKYLAKE_AVX512 (1U<<PROCESSOR_SKYLAKE_AVX512) +#define m_CANNONLAKE (1U<<PROCESSOR_CANNONLAKE) #define m_INTEL (1U<<PROCESSOR_INTEL) #define m_GEODE (1U<<PROCESSOR_GEODE) @@ -854,6 +855,7 @@ static const struct ptt processor_target_table[PROCESSOR_max] = {"knl", &slm_cost, 16, 15, 16, 7, 16}, {"knm", &slm_cost, 16, 15, 16, 7, 16}, {"skylake-avx512", &core_cost, 16, 10, 16, 10, 16}, + {"cannonlake", &core_cost, 16, 10, 16, 10, 16}, {"intel", &intel_cost, 16, 15, 16, 7, 16}, {"geode", &geode_cost, 0, 0, 0, 0, 0}, {"k6", &k6_cost, 32, 7, 32, 7, 32}, @@ -3445,6 +3447,8 @@ ix86_option_override_internal (bool main_args_p, #define PTA_SKYLAKE_AVX512 \ (PTA_SKYLAKE | PTA_AVX512F | PTA_AVX512CD | PTA_AVX512VL \ | PTA_AVX512BW | PTA_AVX512DQ | PTA_PKU) +#define PTA_CANNONLAKE \ + (PTA_SKYLAKE_AVX512 | PTA_AVX512VBMI | PTA_AVX512IFMA | PTA_SHA | PTA_CLWB) #define PTA_KNL \ (PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD) #define PTA_BONNELL \ @@ -3518,6 +3522,7 @@ ix86_option_override_internal (bool main_args_p, {"broadwell", PROCESSOR_HASWELL, CPU_HASWELL, PTA_BROADWELL}, {"skylake", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKYLAKE}, {"skylake-avx512", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKYLAKE_AVX512}, + {"cannonlake", PROCESSOR_HASWELL, CPU_HASWELL, PTA_CANNONLAKE}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL}, {"silvermont", PROCESSOR_SILVERMONT, CPU_SLM, PTA_SILVERMONT}, @@ -31110,7 +31115,9 @@ get_builtin_code_for_version (tree decl, tree *predicate_list) priority = P_PROC_AVX; break; case PROCESSOR_HASWELL: - if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_AVX512VL) + if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_AVX512VBMI) + arg_str = "cannonlake"; + else if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_AVX512VL) arg_str = "skylake-avx512"; else if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_XSAVES) arg_str = "skylake"; @@ -31832,7 +31839,8 @@ fold_builtin_cpu (tree fndecl, tree *args) M_INTEL_COREI7_HASWELL, M_INTEL_COREI7_BROADWELL, M_INTEL_COREI7_SKYLAKE, - M_INTEL_COREI7_SKYLAKE_AVX512 + M_INTEL_COREI7_SKYLAKE_AVX512, + M_INTEL_CANNONLAKE }; static struct _arch_names_table @@ -31856,6 +31864,7 @@ fold_builtin_cpu (tree fndecl, tree *args) {"broadwell", M_INTEL_COREI7_BROADWELL}, {"skylake", M_INTEL_COREI7_SKYLAKE}, {"skylake-avx512", M_INTEL_COREI7_SKYLAKE_AVX512}, + {"cannonlake", M_INTEL_CANNONLAKE}, {"bonnell", M_INTEL_BONNELL}, {"silvermont", M_INTEL_SILVERMONT}, {"knl", M_INTEL_KNL}, diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 837906b..b7b0e5a 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -372,6 +372,7 @@ extern const struct processor_costs ix86_size_cost; #define TARGET_KNL (ix86_tune == PROCESSOR_KNL) #define TARGET_KNM (ix86_tune == PROCESSOR_KNM) #define TARGET_SKYLAKE_AVX512 (ix86_tune == PROCESSOR_SKYLAKE_AVX512) +#define TARGET_CANNONLAKE (ix86_tune == PROCESSOR_CANNONLAKE) #define TARGET_INTEL (ix86_tune == PROCESSOR_INTEL) #define TARGET_GENERIC (ix86_tune == PROCESSOR_GENERIC) #define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10) @@ -2246,6 +2247,7 @@ enum processor_type PROCESSOR_KNL, PROCESSOR_KNM, PROCESSOR_SKYLAKE_AVX512, + PROCESSOR_CANNONLAKE, PROCESSOR_INTEL, PROCESSOR_GEODE, PROCESSOR_K6, diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 2ef88e0..5474187 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -25260,6 +25260,13 @@ SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support. +@item cannonlake +Intel Cannonlake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, +SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, +RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, +XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, +AVX512IFMA, SHA, CLWB and UMIP instruction set support. + @item k6 AMD K6 CPU with MMX instruction set support. diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc index 9ae74cb..ed0748b 100644 --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc @@ -144,6 +144,7 @@ extern void test_arch_core_avx2 (void) __attribute__((__target__("arch=core-avx extern void test_arch_knl (void) __attribute__((__target__("arch=knl"))); extern void test_arch_knm (void) __attribute__((__target__("arch=knm"))); extern void test_arch_skylake_avx512 (void) __attribute__((__target__("arch=skylake-avx512"))); +extern void test_arch_cannonlake (void) __attribute__((__target__("arch=cannonlake"))); extern void test_arch_k8 (void) __attribute__((__target__("arch=k8"))); extern void test_arch_k8_sse3 (void) __attribute__((__target__("arch=k8-sse3"))); extern void test_arch_opteron (void) __attribute__((__target__("arch=opteron"))); -- 2.5.5 ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [x86][patch] Add -march=cannonlake. 2017-11-08 8:08 [x86][patch] Add -march=cannonlake Koval, Julia @ 2017-11-08 19:51 ` Uros Bizjak 2017-11-11 22:03 ` Koval, Julia 0 siblings, 1 reply; 7+ messages in thread From: Uros Bizjak @ 2017-11-08 19:51 UTC (permalink / raw) To: Koval, Julia; +Cc: GCC Patches, Kirill Yukhin On Wed, Nov 8, 2017 at 9:02 AM, Koval, Julia <julia.koval@intel.com> wrote: > Attachment got lost. > >> -----Original Message----- >> From: Koval, Julia >> Sent: Wednesday, November 08, 2017 9:01 AM >> To: 'GCC Patches' <gcc-patches@gcc.gnu.org> >> Cc: 'Uros Bizjak' <ubizjak@gmail.com>; 'Kirill Yukhin' <kirill.yukhin@gmail.com> >> Subject: RE: [x86][patch] Add -march=cannonlake. >> >> Hi, this patch adds new option -march=cannonlake. Isasets defined in: >> https://software.intel.com/sites/default/files/managed/c5/15/architecture- >> instruction-set-extensions-programming-reference.pdf >> >> Ok for trunk? >> >> gcc/ >> * config.gcc: Add -march=cannonlake. >> * config/i386/driver-i386.c (host_detect_local_cpu): Detect cannonlake. >> * config/i386/i386-c.c (ix86_target_macros_internal): Handle >> cannonlake. >> * config/i386/i386.c (processor_costs): Add m_CANNONLAKE. >> (PTA_CANNONLAKE): New. >> (processor_target_table): Add cannonlake. >> (ix86_option_override_internal): Ditto. >> (fold_builtin_cpu): Ditto. >> (get_builtin_code_for_version): Handle cannonlake. >> (M_INTEL_CANNONLAKE): New. >> * config/i386/i386.h (TARGET_CANNONLAKE, >> PROCESSOR_CANNONLAKE): New. >> * doc/invoke.texi: Add -march=cannonlake. >> gcc/testsuite/ >> * gcc.target/i386/funcspec-56.inc: Handle new march. --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -803,9 +803,11 @@ const char *host_detect_local_cpu (int argc, const char **argv) default: if (arch) { + if (has_avx512vbmi) + cpu = "cannonlake"; /* This is unknown family 0x6 CPU. */ /* Assume Knights Landing. */ - if (has_avx512f) + else if (has_avx512f) cpu = "knl"; /* Assume Knights Mill */ else if (has_avx5124vnniw) You should add correct model numbers under <case PROCESSOR_PENTIUMPRO>. The above is for the unknown case (which should not happen), and it should read (note that "knl" is already misplaced): default: /* This is unknown family 0x6 CPU. */ if (arch) { /* Assume Cannonlake. */ if (has_avx512vbmi) cpu = "cannonlake"; /* Assume Knights Mill */ else if (has_avx5124vnniw) cpu = "knm"; /* Assume Skylake. */ else if (has_clflushopt) cpu = "skylake"; /* Assume Knights Landing. */ else if (has_avx512f) cpu = "knl"; /* Assume Broadwell. */ else if (has_adx) ... @@ -31832,7 +31839,8 @@ fold_builtin_cpu (tree fndecl, tree *args) M_INTEL_COREI7_HASWELL, M_INTEL_COREI7_BROADWELL, M_INTEL_COREI7_SKYLAKE, - M_INTEL_COREI7_SKYLAKE_AVX512 + M_INTEL_COREI7_SKYLAKE_AVX512, + M_INTEL_CANNONLAKE }; Please also update libgcc/config/i386/cpuinfo.h, enum processor_features. diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc index 9ae74cb..ed0748b 100644 --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc @@ -144,6 +144,7 @@ extern void test_arch_core_avx2 (void) __attribute__((__target__("arch=core-avx extern void test_arch_knl (void) __attribute__((__target__("arch=knl"))); extern void test_arch_knm (void) __attribute__((__target__("arch=knm"))); extern void test_arch_skylake_avx512 (void) __attribute__((__target__("arch=skylake-avx512"))); +extern void test_arch_cannonlake (void) __attribute__((__target__("arch=cannonlake"))); extern void test_arch_k8 (void) __attribute__((__target__("arch=k8"))); extern void test_arch_k8_sse3 (void) __attribute__((__target__("arch=k8-sse3"))); extern void test_arch_opteron (void) __attribute__((__target__("arch=opteron"))); Please also add new architecture to multiversioning testcases, see gcc/testsuite/g++.dg/ext/mv*.C Uros. ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [x86][patch] Add -march=cannonlake. 2017-11-08 19:51 ` Uros Bizjak @ 2017-11-11 22:03 ` Koval, Julia 2017-11-12 16:32 ` Uros Bizjak 0 siblings, 1 reply; 7+ messages in thread From: Koval, Julia @ 2017-11-11 22:03 UTC (permalink / raw) To: Uros Bizjak; +Cc: GCC Patches, Kirill Yukhin [-- Attachment #1: Type: text/plain, Size: 5626 bytes --] Hi Uros, I fixed comments. Btw, I haven't found skylake-avx512 in driver-i386.c at all. Is it intended or should I add it? Thanks, Julia gcc/ * config.gcc: Add -march=cannonlake. * config/i386/driver-i386.c (host_detect_local_cpu): Detect cannonlake. * config/i386/i386-c.c (ix86_target_macros_internal): Handle cannonlake. * config/i386/i386.c (processor_costs): Add m_CANNONLAKE. (PTA_CANNONLAKE): New. (processor_target_table): Add cannonlake. (ix86_option_override_internal): Ditto. (fold_builtin_cpu): Ditto. (get_builtin_code_for_version): Handle cannonlake. (M_INTEL_COREI7_CANNONLAKE): New. * config/i386/i386.h (TARGET_CANNONLAKE, PROCESSOR_CANNONLAKE): New. * doc/invoke.texi: Add -march=cannonlake. gcc/testsuite/ * gcc.target/i386/funcspec-56.inc: Handle new march. * g++.dg/ext/mv16.C: Ditto. libgcc/ * config/i386/cpuinfo.c (get_intel_cpu): Handle cannonlake. * config/i386/cpuinfo.h (processor_subtypes): Add INTEL_COREI7_CANNONLAKE. > -----Original Message----- > From: Uros Bizjak [mailto:ubizjak@gmail.com] > Sent: Wednesday, November 08, 2017 8:45 PM > To: Koval, Julia <julia.koval@intel.com> > Cc: GCC Patches <gcc-patches@gcc.gnu.org>; Kirill Yukhin > <kirill.yukhin@gmail.com> > Subject: Re: [x86][patch] Add -march=cannonlake. > > On Wed, Nov 8, 2017 at 9:02 AM, Koval, Julia <julia.koval@intel.com> wrote: > > Attachment got lost. > > > >> -----Original Message----- > >> From: Koval, Julia > >> Sent: Wednesday, November 08, 2017 9:01 AM > >> To: 'GCC Patches' <gcc-patches@gcc.gnu.org> > >> Cc: 'Uros Bizjak' <ubizjak@gmail.com>; 'Kirill Yukhin' > <kirill.yukhin@gmail.com> > >> Subject: RE: [x86][patch] Add -march=cannonlake. > >> > >> Hi, this patch adds new option -march=cannonlake. Isasets defined in: > >> https://software.intel.com/sites/default/files/managed/c5/15/architecture- > >> instruction-set-extensions-programming-reference.pdf > >> > >> Ok for trunk? > >> > >> gcc/ > >> * config.gcc: Add -march=cannonlake. > >> * config/i386/driver-i386.c (host_detect_local_cpu): Detect cannonlake. > >> * config/i386/i386-c.c (ix86_target_macros_internal): Handle > >> cannonlake. > >> * config/i386/i386.c (processor_costs): Add m_CANNONLAKE. > >> (PTA_CANNONLAKE): New. > >> (processor_target_table): Add cannonlake. > >> (ix86_option_override_internal): Ditto. > >> (fold_builtin_cpu): Ditto. > >> (get_builtin_code_for_version): Handle cannonlake. > >> (M_INTEL_CANNONLAKE): New. > >> * config/i386/i386.h (TARGET_CANNONLAKE, > >> PROCESSOR_CANNONLAKE): New. > >> * doc/invoke.texi: Add -march=cannonlake. > >> gcc/testsuite/ > >> * gcc.target/i386/funcspec-56.inc: Handle new march. > > --- a/gcc/config/i386/driver-i386.c > +++ b/gcc/config/i386/driver-i386.c > @@ -803,9 +803,11 @@ const char *host_detect_local_cpu (int argc, > const char **argv) > default: > if (arch) > { > + if (has_avx512vbmi) > + cpu = "cannonlake"; > /* This is unknown family 0x6 CPU. */ > /* Assume Knights Landing. */ > - if (has_avx512f) > + else if (has_avx512f) > cpu = "knl"; > /* Assume Knights Mill */ > else if (has_avx5124vnniw) > > You should add correct model numbers under <case > PROCESSOR_PENTIUMPRO>. The above is for the unknown case (which should > not happen), and it should read (note that "knl" is already > misplaced): > > default: > /* This is unknown family 0x6 CPU. */ > if (arch) > { > /* Assume Cannonlake. */ > if (has_avx512vbmi) > cpu = "cannonlake"; > /* Assume Knights Mill */ > else if (has_avx5124vnniw) > cpu = "knm"; > /* Assume Skylake. */ > else if (has_clflushopt) > cpu = "skylake"; > /* Assume Knights Landing. */ > else if (has_avx512f) > cpu = "knl"; > /* Assume Broadwell. */ > else if (has_adx) > ... > > > @@ -31832,7 +31839,8 @@ fold_builtin_cpu (tree fndecl, tree *args) > M_INTEL_COREI7_HASWELL, > M_INTEL_COREI7_BROADWELL, > M_INTEL_COREI7_SKYLAKE, > - M_INTEL_COREI7_SKYLAKE_AVX512 > + M_INTEL_COREI7_SKYLAKE_AVX512, > + M_INTEL_CANNONLAKE > }; > > Please also update libgcc/config/i386/cpuinfo.h, enum processor_features. > > diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc > b/gcc/testsuite/gcc.target/i386/funcspec-56.inc > index 9ae74cb..ed0748b 100644 > --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc > +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc > @@ -144,6 +144,7 @@ extern void test_arch_core_avx2 (void) > __attribute__((__target__("arch=core-avx > extern void test_arch_knl (void) > __attribute__((__target__("arch=knl"))); > extern void test_arch_knm (void) > __attribute__((__target__("arch=knm"))); > extern void test_arch_skylake_avx512 (void) > __attribute__((__target__("arch=skylake-avx512"))); > +extern void test_arch_cannonlake (void) > __attribute__((__target__("arch=cannonlake"))); > extern void test_arch_k8 (void) > __attribute__((__target__("arch=k8"))); > extern void test_arch_k8_sse3 (void) > __attribute__((__target__("arch=k8-sse3"))); > extern void test_arch_opteron (void) > __attribute__((__target__("arch=opteron"))); > > Please also add new architecture to multiversioning testcases, see > gcc/testsuite/g++.dg/ext/mv*.C > > Uros. [-- Attachment #2: 0001-cannonlake.patch --] [-- Type: application/octet-stream, Size: 10700 bytes --] From 934fb3d6736066350950c38dce9b58bb25428d60 Mon Sep 17 00:00:00 2001 From: julia <jkoval@gkticlel801.igk.intel.com> Date: Tue, 7 Nov 2017 19:10:25 +0300 Subject: [PATCH] cannonlake --- gcc/config.gcc | 2 +- gcc/config/i386/driver-i386.c | 17 ++++++++++++----- gcc/config/i386/i386-c.c | 7 +++++++ gcc/config/i386/i386.c | 13 +++++++++++-- gcc/config/i386/i386.h | 2 ++ gcc/doc/invoke.texi | 7 +++++++ gcc/testsuite/g++.dg/ext/mv16.C | 6 ++++++ gcc/testsuite/gcc.target/i386/funcspec-56.inc | 1 + libgcc/config/i386/cpuinfo.c | 5 +++++ libgcc/config/i386/cpuinfo.h | 1 + 10 files changed, 53 insertions(+), 8 deletions(-) diff --git a/gcc/config.gcc b/gcc/config.gcc index 3dace85..1247702 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -629,7 +629,7 @@ x86_64_archs="amdfam10 athlon64 athlon64-sse3 barcelona bdver1 bdver2 \ bdver3 bdver4 znver1 btver1 btver2 k8 k8-sse3 opteron opteron-sse3 nocona \ core2 corei7 corei7-avx core-avx-i core-avx2 atom slm nehalem westmere \ sandybridge ivybridge haswell broadwell bonnell silvermont knl knm \ -skylake-avx512 x86-64 native" +skylake-avx512 cannonlake x86-64 native" # Additional x86 processors supported by --with-cpu=. Each processor # MUST be separated by exactly one space. diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index 8028399..5b3b5ce 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -796,20 +796,27 @@ const char *host_detect_local_cpu (int argc, const char **argv) /* Knights Landing. */ cpu = "knl"; break; + case 0x66: + /* Cannon Lake. */ + cpu = "cannonlake"; + break; case 0x85: - /* Knights Mill. */ + /* Knights Mill. */ cpu = "knm"; break; default: if (arch) { /* This is unknown family 0x6 CPU. */ - /* Assume Knights Landing. */ - if (has_avx512f) - cpu = "knl"; - /* Assume Knights Mill */ + /* Assume Cannon Lake. */ + if (has_avx512vbmi) + cpu = "cannonlake"; + /* Assume Knights Mill. */ else if (has_avx5124vnniw) cpu = "knm"; + /* Assume Knights Landing. */ + else if (has_avx512f) + cpu = "knl"; /* Assume Skylake. */ else if (has_clflushopt) cpu = "skylake"; diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c index 18042cd..e7e8f53 100644 --- a/gcc/config/i386/i386-c.c +++ b/gcc/config/i386/i386-c.c @@ -184,6 +184,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__skylake_avx512"); def_or_undef (parse_in, "__skylake_avx512__"); break; + case PROCESSOR_CANNONLAKE: + def_or_undef (parse_in, "__cannonlake"); + def_or_undef (parse_in, "__cannonlake__"); + break; /* use PROCESSOR_max to not set/unset the arch macro. */ case PROCESSOR_max: break; @@ -302,6 +306,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, case PROCESSOR_SKYLAKE_AVX512: def_or_undef (parse_in, "__tune_skylake_avx512__"); break; + case PROCESSOR_CANNONLAKE: + def_or_undef (parse_in, "__tune_cannonlake__"); + break; case PROCESSOR_LAKEMONT: def_or_undef (parse_in, "__tune_lakemont__"); break; diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 769f189..5796b4f 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -142,6 +142,7 @@ const struct processor_costs *ix86_cost = NULL; #define m_KNL (1U<<PROCESSOR_KNL) #define m_KNM (1U<<PROCESSOR_KNM) #define m_SKYLAKE_AVX512 (1U<<PROCESSOR_SKYLAKE_AVX512) +#define m_CANNONLAKE (1U<<PROCESSOR_CANNONLAKE) #define m_INTEL (1U<<PROCESSOR_INTEL) #define m_GEODE (1U<<PROCESSOR_GEODE) @@ -854,6 +855,7 @@ static const struct ptt processor_target_table[PROCESSOR_max] = {"knl", &slm_cost, 16, 15, 16, 7, 16}, {"knm", &slm_cost, 16, 15, 16, 7, 16}, {"skylake-avx512", &core_cost, 16, 10, 16, 10, 16}, + {"cannonlake", &core_cost, 16, 10, 16, 10, 16}, {"intel", &intel_cost, 16, 15, 16, 7, 16}, {"geode", &geode_cost, 0, 0, 0, 0, 0}, {"k6", &k6_cost, 32, 7, 32, 7, 32}, @@ -3445,6 +3447,8 @@ ix86_option_override_internal (bool main_args_p, #define PTA_SKYLAKE_AVX512 \ (PTA_SKYLAKE | PTA_AVX512F | PTA_AVX512CD | PTA_AVX512VL \ | PTA_AVX512BW | PTA_AVX512DQ | PTA_PKU) +#define PTA_CANNONLAKE \ + (PTA_SKYLAKE_AVX512 | PTA_AVX512VBMI | PTA_AVX512IFMA | PTA_SHA | PTA_CLWB) #define PTA_KNL \ (PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD) #define PTA_BONNELL \ @@ -3518,6 +3522,7 @@ ix86_option_override_internal (bool main_args_p, {"broadwell", PROCESSOR_HASWELL, CPU_HASWELL, PTA_BROADWELL}, {"skylake", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKYLAKE}, {"skylake-avx512", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKYLAKE_AVX512}, + {"cannonlake", PROCESSOR_HASWELL, CPU_HASWELL, PTA_CANNONLAKE}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL}, {"silvermont", PROCESSOR_SILVERMONT, CPU_SLM, PTA_SILVERMONT}, @@ -31111,7 +31116,9 @@ get_builtin_code_for_version (tree decl, tree *predicate_list) priority = P_PROC_AVX; break; case PROCESSOR_HASWELL: - if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_AVX512VL) + if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_AVX512VBMI) + arg_str = "cannonlake"; + else if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_AVX512VL) arg_str = "skylake-avx512"; else if (new_target->x_ix86_isa_flags & OPTION_MASK_ISA_XSAVES) arg_str = "skylake"; @@ -31833,7 +31840,8 @@ fold_builtin_cpu (tree fndecl, tree *args) M_INTEL_COREI7_HASWELL, M_INTEL_COREI7_BROADWELL, M_INTEL_COREI7_SKYLAKE, - M_INTEL_COREI7_SKYLAKE_AVX512 + M_INTEL_COREI7_SKYLAKE_AVX512, + M_INTEL_COREI7_CANNONLAKE }; static struct _arch_names_table @@ -31857,6 +31865,7 @@ fold_builtin_cpu (tree fndecl, tree *args) {"broadwell", M_INTEL_COREI7_BROADWELL}, {"skylake", M_INTEL_COREI7_SKYLAKE}, {"skylake-avx512", M_INTEL_COREI7_SKYLAKE_AVX512}, + {"cannonlake", M_INTEL_COREI7_CANNONLAKE}, {"bonnell", M_INTEL_BONNELL}, {"silvermont", M_INTEL_SILVERMONT}, {"knl", M_INTEL_KNL}, diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 837906b..b7b0e5a 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -372,6 +372,7 @@ extern const struct processor_costs ix86_size_cost; #define TARGET_KNL (ix86_tune == PROCESSOR_KNL) #define TARGET_KNM (ix86_tune == PROCESSOR_KNM) #define TARGET_SKYLAKE_AVX512 (ix86_tune == PROCESSOR_SKYLAKE_AVX512) +#define TARGET_CANNONLAKE (ix86_tune == PROCESSOR_CANNONLAKE) #define TARGET_INTEL (ix86_tune == PROCESSOR_INTEL) #define TARGET_GENERIC (ix86_tune == PROCESSOR_GENERIC) #define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10) @@ -2246,6 +2247,7 @@ enum processor_type PROCESSOR_KNL, PROCESSOR_KNM, PROCESSOR_SKYLAKE_AVX512, + PROCESSOR_CANNONLAKE, PROCESSOR_INTEL, PROCESSOR_GEODE, PROCESSOR_K6, diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 4427328..bc6e86f 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -25324,6 +25324,13 @@ SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support. +@item cannonlake +Intel Cannonlake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, +SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, +RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, +XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, +AVX512IFMA, SHA, CLWB and UMIP instruction set support. + @item k6 AMD K6 CPU with MMX instruction set support. diff --git a/gcc/testsuite/g++.dg/ext/mv16.C b/gcc/testsuite/g++.dg/ext/mv16.C index a3a0fe8..1e1ae3d 100644 --- a/gcc/testsuite/g++.dg/ext/mv16.C +++ b/gcc/testsuite/g++.dg/ext/mv16.C @@ -56,6 +56,10 @@ int __attribute__ ((target("arch=skylake-avx512"))) foo () { return 15; } +int __attribute__ ((target("arch=cannonlake"))) foo () { + return 16; +} + int main () { int val = foo (); @@ -76,6 +80,8 @@ int main () assert (val == 14); else if (__builtin_cpu_is ("skylake-avx512")) assert (val == 15); + else if (__builtin_cpu_is ("cannonlake")) + assert (val == 16); else assert (val == 0); diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc index 9ae74cb..ed0748b 100644 --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc @@ -144,6 +144,7 @@ extern void test_arch_core_avx2 (void) __attribute__((__target__("arch=core-avx extern void test_arch_knl (void) __attribute__((__target__("arch=knl"))); extern void test_arch_knm (void) __attribute__((__target__("arch=knm"))); extern void test_arch_skylake_avx512 (void) __attribute__((__target__("arch=skylake-avx512"))); +extern void test_arch_cannonlake (void) __attribute__((__target__("arch=cannonlake"))); extern void test_arch_k8 (void) __attribute__((__target__("arch=k8"))); extern void test_arch_k8_sse3 (void) __attribute__((__target__("arch=k8-sse3"))); extern void test_arch_opteron (void) __attribute__((__target__("arch=opteron"))); diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c index c2ab8be..15799f4 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -198,6 +198,11 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id) __cpu_model.__cpu_type = INTEL_COREI7; __cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512; break; + case 0x66: + /* Cannon Lake. */ + __cpu_model.__cpu_type = INTEL_COREI7; + __cpu_model.__cpu_subtype = INTEL_COREI7_CANNONLAKE; + break; case 0x17: case 0x1d: /* Penryn. */ diff --git a/libgcc/config/i386/cpuinfo.h b/libgcc/config/i386/cpuinfo.h index 3978401..4b2a3c5 100644 --- a/libgcc/config/i386/cpuinfo.h +++ b/libgcc/config/i386/cpuinfo.h @@ -69,6 +69,7 @@ enum processor_subtypes INTEL_COREI7_BROADWELL, INTEL_COREI7_SKYLAKE, INTEL_COREI7_SKYLAKE_AVX512, + INTEL_COREI7_CANNONLAKE, CPU_SUBTYPE_MAX }; -- 2.5.5 ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [x86][patch] Add -march=cannonlake. 2017-11-11 22:03 ` Koval, Julia @ 2017-11-12 16:32 ` Uros Bizjak 2017-11-13 10:32 ` Koval, Julia 0 siblings, 1 reply; 7+ messages in thread From: Uros Bizjak @ 2017-11-12 16:32 UTC (permalink / raw) To: Koval, Julia; +Cc: GCC Patches, Kirill Yukhin On Sat, Nov 11, 2017 at 10:10 PM, Koval, Julia <julia.koval@intel.com> wrote: > Hi Uros, > I fixed comments. > Btw, I haven't found skylake-avx512 in driver-i386.c at all. Is it intended or should I add it? It looks like an oversight to me. If there are no "skylake-avx512" model, then the driver goes through "This is unknown ..." for -march=native and hopefully chooses the next most appropriate choice. Please add "skylake-avx512" in a follow-up patch. > Thanks, > Julia > > gcc/ > * config.gcc: Add -march=cannonlake. > * config/i386/driver-i386.c (host_detect_local_cpu): Detect cannonlake. > * config/i386/i386-c.c (ix86_target_macros_internal): Handle cannonlake. > * config/i386/i386.c (processor_costs): Add m_CANNONLAKE. > (PTA_CANNONLAKE): New. > (processor_target_table): Add cannonlake. > (ix86_option_override_internal): Ditto. > (fold_builtin_cpu): Ditto. > (get_builtin_code_for_version): Handle cannonlake. > (M_INTEL_COREI7_CANNONLAKE): New. > * config/i386/i386.h (TARGET_CANNONLAKE, PROCESSOR_CANNONLAKE): New. > * doc/invoke.texi: Add -march=cannonlake. > gcc/testsuite/ > * gcc.target/i386/funcspec-56.inc: Handle new march. > * g++.dg/ext/mv16.C: Ditto. > libgcc/ > * config/i386/cpuinfo.c (get_intel_cpu): Handle cannonlake. > * config/i386/cpuinfo.h (processor_subtypes): Add INTEL_COREI7_CANNONLAKE. OK. Thanks, Uros. ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [x86][patch] Add -march=cannonlake. 2017-11-12 16:32 ` Uros Bizjak @ 2017-11-13 10:32 ` Koval, Julia 2017-11-13 11:53 ` Uros Bizjak 0 siblings, 1 reply; 7+ messages in thread From: Koval, Julia @ 2017-11-13 10:32 UTC (permalink / raw) To: Uros Bizjak; +Cc: GCC Patches, Kirill Yukhin [-- Attachment #1: Type: text/plain, Size: 2043 bytes --] Hi, here is followup patch to add skylake-avx512. gcc/ * config/i386/driver-i386.c (host_detect_local_cpu): Detect skylake-avx512. > -----Original Message----- > From: Uros Bizjak [mailto:ubizjak@gmail.com] > Sent: Sunday, November 12, 2017 5:05 PM > To: Koval, Julia <julia.koval@intel.com> > Cc: GCC Patches <gcc-patches@gcc.gnu.org>; Kirill Yukhin > <kirill.yukhin@gmail.com> > Subject: Re: [x86][patch] Add -march=cannonlake. > > On Sat, Nov 11, 2017 at 10:10 PM, Koval, Julia <julia.koval@intel.com> wrote: > > Hi Uros, > > I fixed comments. > > Btw, I haven't found skylake-avx512 in driver-i386.c at all. Is it intended or > should I add it? > > It looks like an oversight to me. If there are no "skylake-avx512" > model, then the driver goes through "This is unknown ..." for > -march=native and hopefully chooses the next most appropriate choice. > Please add "skylake-avx512" in a follow-up patch. > > > Thanks, > > Julia > > > > gcc/ > > * config.gcc: Add -march=cannonlake. > > * config/i386/driver-i386.c (host_detect_local_cpu): Detect cannonlake. > > * config/i386/i386-c.c (ix86_target_macros_internal): Handle cannonlake. > > * config/i386/i386.c (processor_costs): Add m_CANNONLAKE. > > (PTA_CANNONLAKE): New. > > (processor_target_table): Add cannonlake. > > (ix86_option_override_internal): Ditto. > > (fold_builtin_cpu): Ditto. > > (get_builtin_code_for_version): Handle cannonlake. > > (M_INTEL_COREI7_CANNONLAKE): New. > > * config/i386/i386.h (TARGET_CANNONLAKE, > PROCESSOR_CANNONLAKE): New. > > * doc/invoke.texi: Add -march=cannonlake. > > gcc/testsuite/ > > * gcc.target/i386/funcspec-56.inc: Handle new march. > > * g++.dg/ext/mv16.C: Ditto. > > libgcc/ > > * config/i386/cpuinfo.c (get_intel_cpu): Handle cannonlake. > > * config/i386/cpuinfo.h (processor_subtypes): Add > INTEL_COREI7_CANNONLAKE. > > OK. > > Thanks, > Uros. [-- Attachment #2: 0001-skylake-512.patch --] [-- Type: application/octet-stream, Size: 1191 bytes --] From b3264b80535e81894caddb1905535cf6efd04b21 Mon Sep 17 00:00:00 2001 From: julia <jkoval@gkticlel801.igk.intel.com> Date: Mon, 13 Nov 2017 11:58:52 +0300 Subject: [PATCH] skylake-512 --- gcc/config/i386/driver-i386.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index 5b3b5ce..4f8fb6a 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -792,6 +792,10 @@ const char *host_detect_local_cpu (int argc, const char **argv) /* Kaby Lake. */ cpu = "skylake"; break; + case 0x55: + /* Skylake with AVX-512. */ + cpu = "skylake-avx512"; + break; case 0x57: /* Knights Landing. */ cpu = "knl"; @@ -815,8 +819,11 @@ const char *host_detect_local_cpu (int argc, const char **argv) else if (has_avx5124vnniw) cpu = "knm"; /* Assume Knights Landing. */ - else if (has_avx512f) + else if (has_avx512er) cpu = "knl"; + /* Assume Skylake with AVX-512. */ + else if (has_avx512f) + cpu = "skylake-avx512"; /* Assume Skylake. */ else if (has_clflushopt) cpu = "skylake"; -- 2.5.5 ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [x86][patch] Add -march=cannonlake. 2017-11-13 10:32 ` Koval, Julia @ 2017-11-13 11:53 ` Uros Bizjak 0 siblings, 0 replies; 7+ messages in thread From: Uros Bizjak @ 2017-11-13 11:53 UTC (permalink / raw) To: Koval, Julia; +Cc: GCC Patches, Kirill Yukhin On Mon, Nov 13, 2017 at 11:29 AM, Koval, Julia <julia.koval@intel.com> wrote: > Hi, here is followup patch to add skylake-avx512. > gcc/ > * config/i386/driver-i386.c (host_detect_local_cpu): Detect skylake-avx512. OK. Thanks, Uros. ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [x86][patch] Add -march=cannonlake. @ 2017-11-08 8:06 Koval, Julia 0 siblings, 0 replies; 7+ messages in thread From: Koval, Julia @ 2017-11-08 8:06 UTC (permalink / raw) To: 'GCC Patches'; +Cc: Uros Bizjak, 'Kirill Yukhin' Hi, this patch adds new option -march=cannonlake. Isasets defined in: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf Ok for trunk? gcc/ * config.gcc: Add -march=cannonlake. * config/i386/driver-i386.c (host_detect_local_cpu): Detect cannonlake. * config/i386/i386-c.c (ix86_target_macros_internal): Handle cannonlake. * config/i386/i386.c (processor_costs): Add m_CANNONLAKE. (PTA_CANNONLAKE): New. (processor_target_table): Add cannonlake. (ix86_option_override_internal): Ditto. (fold_builtin_cpu): Ditto. (get_builtin_code_for_version): Handle cannonlake. (M_INTEL_CANNONLAKE): New. * config/i386/i386.h (TARGET_CANNONLAKE, PROCESSOR_CANNONLAKE): New. * doc/invoke.texi: Add -march=cannonlake. gcc/testsuite/ * gcc.target/i386/funcspec-56.inc: Handle new march. Thanks, Julia ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-11-13 11:18 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-11-08 8:08 [x86][patch] Add -march=cannonlake Koval, Julia 2017-11-08 19:51 ` Uros Bizjak 2017-11-11 22:03 ` Koval, Julia 2017-11-12 16:32 ` Uros Bizjak 2017-11-13 10:32 ` Koval, Julia 2017-11-13 11:53 ` Uros Bizjak -- strict thread matches above, loose matches on Subject: below -- 2017-11-08 8:06 Koval, Julia
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).