From: Richard Earnshaw <rearnsha@arm.com>
To: Bernd Schmidt <bernds@codesourcery.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>
Subject: Re: [ARM] Fix PR49641
Date: Mon, 17 Oct 2011 13:34:00 -0000 [thread overview]
Message-ID: <4E9C2586.7080804@arm.com> (raw)
In-Reply-To: <4E983996.4030908@codesourcery.com>
On 14/10/11 14:31, Bernd Schmidt wrote:
> On 07/13/11 16:03, Richard Earnshaw wrote:
>>> * config/arm/arm.c (store_multiple_sequence): Avoid cases where
>>> the base reg is stored iff compiling for Thumb1.
>>>
>>> * gcc.target/arm/pr49641.c: New test.
>
> Ping. Richard, you replied to the mail but didn't comment on the patch.
>
>
> Bernd
>
Sorry, I thought I'd made it clear that I don't think the compiler
should ever use STM with write-back if the base register is in the
stored list. We must certainly never do it if the base register is not
the first register in the list as this has always been unpredictable.
BTW, this is not Thumb1 specific, it applies at all times.
So, no the patch is not OK as it stands.
R.
next prev parent reply other threads:[~2011-10-17 12:54 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-07 20:08 Bernd Schmidt
2011-07-13 14:31 ` Richard Earnshaw
2011-10-14 13:57 ` Bernd Schmidt
2011-10-17 13:34 ` Richard Earnshaw [this message]
2011-10-18 12:26 ` Bernd Schmidt
2011-10-18 12:59 ` Richard Earnshaw
2011-10-18 14:24 ` Bernd Schmidt
2011-10-18 14:26 ` Richard Earnshaw
2011-10-24 14:00 ` Sebastian Huber
2011-10-25 17:52 ` Richard Earnshaw
2011-10-31 11:53 ` Sebastian Huber
2011-11-08 8:35 ` Sebastian Huber
2011-11-16 10:41 ` Sebastian Huber
2011-11-16 19:05 ` Richard Earnshaw
[not found] ` <4E1DA543.4030000@arm.com>
2011-07-25 17:00 ` Bernd Schmidt
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