From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29428 invoked by alias); 16 Apr 2012 12:42:14 -0000 Received: (qmail 29361 invoked by uid 22791); 16 Apr 2012 12:42:11 -0000 X-SWARE-Spam-Status: No, hits=-1.6 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 16 Apr 2012 12:41:52 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Mon, 16 Apr 2012 13:41:50 +0100 Received: from [10.1.69.67] ([10.1.255.212]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 16 Apr 2012 13:43:01 +0100 Message-ID: <4F8C138B.6090309@arm.com> Date: Mon, 16 Apr 2012 12:42:00 -0000 From: Richard Earnshaw User-Agent: Mozilla/5.0 (X11; Linux i686 on x86_64; rv:11.0) Gecko/20120327 Thunderbird/11.0.1 MIME-Version: 1.0 To: Andrew Stubbs CC: "gcc-patches@gcc.gnu.org" , "patches@linaro.org" Subject: Re: [PATCH][ARM] NEON DImode neg References: <4F4D12C5.9070805@codesourcery.com> <4F704189.4010302@codesourcery.com> <4F86F932.60606@arm.com> <4F897239.1090901@codesourcery.com> <4F897794.7010402@codesourcery.com> In-Reply-To: <4F897794.7010402@codesourcery.com> X-MC-Unique: 112041613415001801 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-04/txt/msg00926.txt.bz2 On 14/04/12 14:11, Andrew Stubbs wrote: > And now with the patch. :( >=20 > On 14/04/12 13:48, Andrew Stubbs wrote: >> On 12/04/12 16:48, Richard Earnshaw wrote: >>> If negation in Neon needs a scratch register, it seems to me to be >>> somewhat odd that we're disparaging the ARM version. >>> >>> Also, wouldn't it be sensible to support a variant that was >>> early-clobber on operand 0, but loaded immediate zero into that value >>> first: >>> >>> vmov Dd, #0 >>> vsub Dd, Dd, Dm >>> >>> That way you'll never need more than two registers, whereas today you >>> want three. >> >> This patch implements the changes you suggested. >> >> I've done a full bootstrap and test and found no regressions. >> >> OK? >> >> Andrew >> >> P.S. This patch can't actually be committed until my "NEON DImode >> immediate constants" patch is approved and committed. (Without that the >> load #0 needs a constant pool, and loading constants this late has a bug >> at -O0.) >> >> neon-neg64.patch >> >> >> 2012-04-12 Andrew Stubbs >> >> gcc/ >> * config/arm/arm.md (negdi2): Use gen_negdi2_neon. >> * config/arm/neon.md (negdi2_neon): New insn. >> Also add splitters for core and NEON registers. >> OK R.