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To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn References: <20231116072745.6177-1-chenglulu@loongson.cn> From: chenglulu Message-ID: <4a04776c-810d-5c3c-6132-646cf52fbe5c@loongson.cn> Date: Sat, 18 Nov 2023 16:16:18 +0800 User-Agent: Mozilla/5.0 (X11; Linux loongarch64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20231116072745.6177-1-chenglulu@loongson.cn> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-CM-TRANSID:AQAAf8Bxni_SclhlsB5GAA--.22891S3 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj9fXoWfJF4fZw15XF1xZFW3AF1xXrc_yoW8ZrWDCo ZayF17Za1xGryFkwsF9r9xuFy09FyUAw45Za9a9ryrWF4kJr15J392gws8Z3srJF9rX345 AF97Xa9rAa97J398l-sFpf9Il3svdjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8wcxFpf 9Il3svdxBIdaVrn0xqx4xG64xvF2IEw4CE5I8CrVC2j2Jv73VFW2AGmfu7bjvjm3AaLaJ3 UjIYCTnIWjp_UUUYc7kC6x804xWl14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI 8IcIk0rVWrJVCq3wAFIxvE14AKwVWUGVWUXwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xG Y2AK021l84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF7I0E14 v26r1j6r4UM28EF7xvwVC2z280aVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8JVW8Jr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27w Aqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JF0_Jw1lYx0Ex4A2jsIE 14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvEwIxGrwCYjI0SjxkI62AI1c AE67vIY487MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8C rVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtw CIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1I6r4UMIIF0xvE2Ix0cI8IcVCY1x02 67AKxVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr 0_Gr1lIxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxUcsjj DUUUU X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00,GIT_PATCH_0,KAM_DMARC_STATUS,KAM_SHORT,KAM_STOCKGEN,MIME_CHARSET_FARAWAY,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: Pushed to r14-5567. ÔÚ 2023/11/16 ÏÂÎç3:27, Lulu Cheng дµÀ: > When compiling with '-mcmodel=medium', the function call is made through > 'pcaddu18i+jirl' if binutils supports call36, otherwise the > native implementation 'pcalau12i+jirl' is used. > > gcc/ChangeLog: > > * config.in: Regenerate. > * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro. > * config/loongarch/loongarch.cc (loongarch_legitimize_call_address): > If binutils supports call36, the function call is not split over expand. > * config/loongarch/loongarch.md: Add call36 generation code. > * config/loongarch/predicates.md: Likewise. > * configure: Regenerate. > * configure.ac: Check whether binutils supports call36. > > gcc/testsuite/ChangeLog: > > * gcc.target/loongarch/func-call-medium-5.c: If the assembler supports call36, > the test is abandoned. > * gcc.target/loongarch/func-call-medium-6.c: Likewise. > * gcc.target/loongarch/func-call-medium-7.c: Likewise. > * gcc.target/loongarch/func-call-medium-8.c: Likewise. > * lib/target-supports.exp: Added a function to see if the assembler supports > the call36 relocation. > * gcc.target/loongarch/func-call-medium-call36-1.c: New test. > * gcc.target/loongarch/func-call-medium-call36.c: New test. > > Co-authored-by: Xi Ruoyao > > --- > v1 -> v2: > 1. Add '(clobber (reg:P 12))' instead of '-fno-ipa-ra' in sibcall implementation. > 2. Add test cases. > > --- > gcc/config.in | 6 + > gcc/config/loongarch/loongarch-opts.h | 4 + > gcc/config/loongarch/loongarch.cc | 12 +- > gcc/config/loongarch/loongarch.md | 171 +++++++++++++++--- > gcc/config/loongarch/predicates.md | 7 +- > gcc/configure | 32 ++++ > gcc/configure.ac | 6 + > .../gcc.target/loongarch/func-call-medium-5.c | 1 + > .../gcc.target/loongarch/func-call-medium-6.c | 1 + > .../gcc.target/loongarch/func-call-medium-7.c | 1 + > .../gcc.target/loongarch/func-call-medium-8.c | 1 + > .../loongarch/func-call-medium-call36-1.c | 21 +++ > .../loongarch/func-call-medium-call36.c | 32 ++++ > gcc/testsuite/lib/target-supports.exp | 9 + > 14 files changed, 268 insertions(+), 36 deletions(-) > create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-medium-call36-1.c > create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-medium-call36.c > > diff --git a/gcc/config.in b/gcc/config.in > index 866f9fff101..e100c20dcd0 100644 > --- a/gcc/config.in > +++ b/gcc/config.in > @@ -781,6 +781,12 @@ > #endif > > > +/* Define if your assembler supports call36 relocation. */ > +#ifndef USED_FOR_TARGET > +#undef HAVE_AS_SUPPORT_CALL36 > +#endif > + > + > /* Define if your assembler and linker support thread-local storage. */ > #ifndef USED_FOR_TARGET > #undef HAVE_AS_TLS > diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h > index 8de41bbc4f7..6dd309aad96 100644 > --- a/gcc/config/loongarch/loongarch-opts.h > +++ b/gcc/config/loongarch/loongarch-opts.h > @@ -97,6 +97,10 @@ loongarch_update_gcc_opt_status (struct loongarch_target *target, > #define HAVE_AS_EXPLICIT_RELOCS 0 > #endif > > +#ifndef HAVE_AS_SUPPORT_CALL36 > +#define HAVE_AS_SUPPORT_CALL36 0 > +#endif > + > #ifndef HAVE_AS_MRELAX_OPTION > #define HAVE_AS_MRELAX_OPTION 0 > #endif > diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc > index 738911661d7..0bd416255be 100644 > --- a/gcc/config/loongarch/loongarch.cc > +++ b/gcc/config/loongarch/loongarch.cc > @@ -3006,12 +3006,16 @@ loongarch_legitimize_call_address (rtx addr) > > enum loongarch_symbol_type symbol_type = loongarch_classify_symbol (addr); > > - /* Split function call insn 'bl sym' or 'bl %plt(sym)' to : > - pcalau12i $rd, %pc_hi20(sym) > - jr $rd, %pc_lo12(sym). */ > + /* If add the compilation option '-cmodel=medium', and the assembler does > + not support call36. The following sequence of instructions will be > + used for the function call: > + pcalau12i $rd, %pc_hi20(sym) > + jr $rd, %pc_lo12(sym) > + */ > > if (TARGET_CMODEL_MEDIUM > - && TARGET_EXPLICIT_RELOCS > + && !HAVE_AS_SUPPORT_CALL36 > + && (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) > && (SYMBOL_REF_P (addr) || LABEL_REF_P (addr)) > && (symbol_type == SYMBOL_PCREL > || (symbol_type == SYMBOL_GOT_DISP && flag_plt))) > diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md > index 22814a3679c..f0b6ae3e2a2 100644 > --- a/gcc/config/loongarch/loongarch.md > +++ b/gcc/config/loongarch/loongarch.md > @@ -3274,7 +3274,13 @@ (define_expand "sibcall" > XEXP (target, 1), > operands[1])); > else > - emit_call_insn (gen_sibcall_internal (target, operands[1])); > + { > + rtx call = emit_call_insn (gen_sibcall_internal (target, operands[1])); > + > + if (TARGET_CMODEL_MEDIUM && !REG_P (target)) > + clobber_reg (&CALL_INSN_FUNCTION_USAGE (call), > + gen_rtx_REG (Pmode, T0_REGNUM)); > + } > DONE; > }) > > @@ -3282,10 +3288,25 @@ (define_insn "sibcall_internal" > [(call (mem:SI (match_operand 0 "call_insn_operand" "j,c,b")) > (match_operand 1 "" ""))] > "SIBLING_CALL_P (insn)" > - "@ > - jr\t%0 > - b\t%0 > - b\t%%plt(%0)" > +{ > + switch (which_alternative) > + { > + case 0: > + return "jr\t%0"; > + case 1: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r12,%%call36(%0)\n\tjirl\t$r0,$r12,0"; > + else > + return "b\t%0"; > + case 2: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r12,%%call36(%0)\n\tjirl\t$r0,$r12,0"; > + else > + return "b\t%%plt(%0)"; > + default: > + gcc_unreachable (); > + } > +} > [(set_attr "jirl" "indirect,direct,direct")]) > > (define_insn "@sibcall_internal_1" > @@ -3318,9 +3339,17 @@ (define_expand "sibcall_value" > operands[2], > arg2)); > else > - emit_call_insn (gen_sibcall_value_multiple_internal (arg1, target, > - operands[2], > - arg2)); > + { > + rtx call > + = emit_call_insn (gen_sibcall_value_multiple_internal (arg1, > + target, > + operands[2], > + arg2)); > + > + if (TARGET_CMODEL_MEDIUM && !REG_P (target)) > + clobber_reg (&CALL_INSN_FUNCTION_USAGE (call), > + gen_rtx_REG (Pmode, T0_REGNUM)); > + } > } > else > { > @@ -3334,8 +3363,15 @@ (define_expand "sibcall_value" > XEXP (target, 1), > operands[2])); > else > - emit_call_insn (gen_sibcall_value_internal (operands[0], target, > - operands[2])); > + { > + rtx call = emit_call_insn (gen_sibcall_value_internal (operands[0], > + target, > + operands[2])); > + > + if (TARGET_CMODEL_MEDIUM && !REG_P (target)) > + clobber_reg (&CALL_INSN_FUNCTION_USAGE (call), > + gen_rtx_REG (Pmode, T0_REGNUM)); > + } > } > DONE; > }) > @@ -3345,10 +3381,25 @@ (define_insn "sibcall_value_internal" > (call (mem:SI (match_operand 1 "call_insn_operand" "j,c,b")) > (match_operand 2 "" "")))] > "SIBLING_CALL_P (insn)" > - "@ > - jr\t%1 > - b\t%1 > - b\t%%plt(%1)" > +{ > + switch (which_alternative) > + { > + case 0: > + return "jr\t%1"; > + case 1: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r12,%%call36(%1)\n\tjirl\t$r0,$r12,0"; > + else > + return "b\t%1"; > + case 2: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r12,%%call36(%1)\n\tjirl\t$r0,$r12,0"; > + else > + return "b\t%%plt(%1)"; > + default: > + gcc_unreachable (); > + } > +} > [(set_attr "jirl" "indirect,direct,direct")]) > > (define_insn "@sibcall_value_internal_1" > @@ -3368,10 +3419,25 @@ (define_insn "sibcall_value_multiple_internal" > (call (mem:SI (match_dup 1)) > (match_dup 2)))] > "SIBLING_CALL_P (insn)" > - "@ > - jr\t%1 > - b\t%1 > - b\t%%plt(%1)" > +{ > + switch (which_alternative) > + { > + case 0: > + return "jr\t%1"; > + case 1: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r12,%%call36(%1)\n\tjirl\t$r0,$r12,0"; > + else > + return "b\t%1"; > + case 2: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r12,%%call36(%1)\n\tjirl\t$r0,$r12,0"; > + else > + return "b\t%%plt(%1)"; > + default: > + gcc_unreachable (); > + } > +} > [(set_attr "jirl" "indirect,direct,direct")]) > > (define_insn "@sibcall_value_multiple_internal_1" > @@ -3411,10 +3477,25 @@ (define_insn "call_internal" > (match_operand 1 "" "")) > (clobber (reg:SI RETURN_ADDR_REGNUM))] > "" > - "@ > - jirl\t$r1,%0,0 > - bl\t%0 > - bl\t%%plt(%0)" > +{ > + switch (which_alternative) > + { > + case 0: > + return "jirl\t$r1,%0,0"; > + case 1: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r1,%%call36(%0)\n\tjirl\t$r1,$r1,0"; > + else > + return "bl\t%0"; > + case 2: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r1,%%call36(%0)\n\tjirl\t$r1,$r1,0"; > + else > + return "bl\t%%plt(%0)"; > + default: > + gcc_unreachable (); > + } > +} > [(set_attr "jirl" "indirect,direct,direct")]) > > (define_insn "@call_internal_1" > @@ -3473,10 +3554,25 @@ (define_insn "call_value_internal" > (match_operand 2 "" ""))) > (clobber (reg:SI RETURN_ADDR_REGNUM))] > "" > - "@ > - jirl\t$r1,%1,0 > - bl\t%1 > - bl\t%%plt(%1)" > +{ > + switch (which_alternative) > + { > + case 0: > + return "jirl\t$r1,%1,0"; > + case 1: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r1,%%call36(%1)\n\tjirl\t$r1,$r1,0"; > + else > + return "bl\t%1"; > + case 2: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r1,%%call36(%1)\n\tjirl\t$r1,$r1,0"; > + else > + return "bl\t%%plt(%1)"; > + default: > + gcc_unreachable (); > + } > +} > [(set_attr "jirl" "indirect,direct,direct")]) > > (define_insn "@call_value_internal_1" > @@ -3498,10 +3594,25 @@ (define_insn "call_value_multiple_internal" > (match_dup 2))) > (clobber (reg:SI RETURN_ADDR_REGNUM))] > "" > - "@ > - jirl\t$r1,%1,0 > - bl\t%1 > - bl\t%%plt(%1)" > +{ > + switch (which_alternative) > + { > + case 0: > + return "jirl\t$r1,%1,0"; > + case 1: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r1,%%call36(%1)\n\tjirl\t$r1,$r1,0"; > + else > + return "bl\t%1"; > + case 2: > + if (TARGET_CMODEL_MEDIUM) > + return "pcaddu18i\t$r1,%%call36(%1)\n\tjirl\t$r1,$r1,0"; > + else > + return "bl\t%%plt(%1)"; > + default: > + gcc_unreachable (); > + } > +} > [(set_attr "jirl" "indirect,direct,direct")]) > > (define_insn "@call_value_multiple_internal_1" > diff --git a/gcc/config/loongarch/predicates.md b/gcc/config/loongarch/predicates.md > index 946ed0d8212..56f7c48e126 100644 > --- a/gcc/config/loongarch/predicates.md > +++ b/gcc/config/loongarch/predicates.md > @@ -443,7 +443,9 @@ (define_predicate "const_call_insn_operand" > { > case SYMBOL_PCREL: > if (TARGET_CMODEL_EXTREME > - || (TARGET_CMODEL_MEDIUM && !TARGET_EXPLICIT_RELOCS)) > + || (TARGET_CMODEL_MEDIUM > + && HAVE_AS_SUPPORT_CALL36 > + && (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE))) > return false; > else > return 1; > @@ -452,7 +454,8 @@ (define_predicate "const_call_insn_operand" > if (TARGET_CMODEL_EXTREME > || !flag_plt > || (flag_plt && TARGET_CMODEL_MEDIUM > - && !TARGET_EXPLICIT_RELOCS)) > + && HAVE_AS_SUPPORT_CALL36 > + && (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE))) > return false; > else > return 1; > diff --git a/gcc/configure b/gcc/configure > index ee97934ac4f..cc0c3aad67b 100755 > --- a/gcc/configure > +++ b/gcc/configure > @@ -30951,6 +30951,38 @@ if test $gcc_cv_as_loongarch_explicit_relocs = yes; then > > $as_echo "#define HAVE_AS_EXPLICIT_RELOCS 1" >>confdefs.h > > +fi > + > + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for call36 relocation support" >&5 > +$as_echo_n "checking assembler for call36 relocation support... " >&6; } > +if ${gcc_cv_as_loongarch_call36+:} false; then : > + $as_echo_n "(cached) " >&6 > +else > + gcc_cv_as_loongarch_call36=no > + if test x$gcc_cv_as != x; then > + $as_echo 'pcaddu18i $r1, %call36(a) > + jirl $r1, $r1, 0' > conftest.s > + if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5' > + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 > + (eval $ac_try) 2>&5 > + ac_status=$? > + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 > + test $ac_status = 0; }; } > + then > + gcc_cv_as_loongarch_call36=yes > + else > + echo "configure: failed program was" >&5 > + cat conftest.s >&5 > + fi > + rm -f conftest.o conftest.s > + fi > +fi > +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_call36" >&5 > +$as_echo "$gcc_cv_as_loongarch_call36" >&6; } > +if test $gcc_cv_as_loongarch_call36 = yes; then > + > +$as_echo "#define HAVE_AS_SUPPORT_CALL36 1" >>confdefs.h > + > fi > > { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for eh_frame pcrel encoding support" >&5 > diff --git a/gcc/configure.ac b/gcc/configure.ac > index d0caf820648..d9a35069e30 100644 > --- a/gcc/configure.ac > +++ b/gcc/configure.ac > @@ -5441,6 +5441,12 @@ x: > [a:pcalau12i $t0,%pc_hi20(a)],, > [AC_DEFINE(HAVE_AS_EXPLICIT_RELOCS, 1, > [Define if your assembler supports explicit relocation.])]) > + gcc_GAS_CHECK_FEATURE([call36 relocation support], > + gcc_cv_as_loongarch_call36,, > + [pcaddu18i $r1, %call36(a) > + jirl $r1, $r1, 0],, > + [AC_DEFINE(HAVE_AS_SUPPORT_CALL36, 1, > + [Define if your assembler supports call36 relocation.])]) > gcc_GAS_CHECK_FEATURE([eh_frame pcrel encoding support], > gcc_cv_as_loongarch_eh_frame_pcrel_encoding_support,, > [.cfi_startproc > diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-5.c b/gcc/testsuite/gcc.target/loongarch/func-call-medium-5.c > index 8a47b5afcba..cae880bd80c 100644 > --- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-5.c > +++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-5.c > @@ -1,4 +1,5 @@ > /* { dg-do compile } */ > +/* { dg-skip-if "dg-require-effective-target loongarch_call36_support" { *-*-* } } */ > /* { dg-options "-mabi=lp64d -O0 -fpic -fplt -mexplicit-relocs -mcmodel=medium" } */ > /* { dg-final { scan-assembler "test:.*pcalau12i.*%pc_hi20\\(g\\)\n\tjirl.*pc_lo12\\(g\\)" } } */ > /* { dg-final { scan-assembler "test1:.*pcalau12i.*%pc_hi20\\(f\\)\n\tjirl.*%pc_lo12\\(f\\)" } } */ > diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-6.c b/gcc/testsuite/gcc.target/loongarch/func-call-medium-6.c > index 1e75e60e01a..33819542d83 100644 > --- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-6.c > +++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-6.c > @@ -1,4 +1,5 @@ > /* { dg-do compile } */ > +/* { dg-skip-if "dg-require-effective-target loongarch_call36_support" { *-*-* } } */ > /* { dg-options "-mabi=lp64d -O0 -fno-pic -fplt -mexplicit-relocs -mcmodel=medium" } */ > /* { dg-final { scan-assembler "test:.*pcalau12i.*%pc_hi20\\(g\\)\n\tjirl.*pc_lo12\\(g\\)" } } */ > /* { dg-final { scan-assembler "test1:.*pcalau12i.*%pc_hi20\\(f\\)\n\tjirl.*%pc_lo12\\(f\\)" } } */ > diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-7.c b/gcc/testsuite/gcc.target/loongarch/func-call-medium-7.c > index 9e89085ca19..969b59d043e 100644 > --- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-7.c > +++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-7.c > @@ -1,4 +1,5 @@ > /* { dg-do compile } */ > +/* { dg-skip-if "dg-require-effective-target loongarch_call36_support" { *-*-* } } */ > /* { dg-options "-mabi=lp64d -O0 -fpic -fno-plt -mexplicit-relocs -mcmodel=medium" } */ > /* { dg-final { scan-assembler "test:.*pcalau12i\t.*%got_pc_hi20\\(g\\)\n\tld\.d\t.*%got_pc_lo12\\(g\\)\n\tjirl" } } */ > /* { dg-final { scan-assembler "test1:.*pcalau12i\t.*%got_pc_hi20\\(f\\)\n\tld\.d\t.*%got_pc_lo12\\(f\\)\n\tjirl" } } */ > diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-8.c b/gcc/testsuite/gcc.target/loongarch/func-call-medium-8.c > index fde9c6e0ef4..786ff395f0b 100644 > --- a/gcc/testsuite/gcc.target/loongarch/func-call-medium-8.c > +++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-8.c > @@ -1,4 +1,5 @@ > /* { dg-do compile } */ > +/* { dg-skip-if "dg-require-effective-target loongarch_call36_support" { *-*-* } } */ > /* { dg-options "-mabi=lp64d -O0 -fno-pic -fno-plt -mexplicit-relocs -mcmodel=medium" } */ > /* { dg-final { scan-assembler "test:.*pcalau12i\t.*%got_pc_hi20\\(g\\)\n\tld\.d\t.*%got_pc_lo12\\(g\\)\n\tjirl" } } */ > /* { dg-final { scan-assembler "test1:.*pcalau12i\t.*%pc_hi20\\(f\\)\n\tjirl.*%pc_lo12\\(f\\)" } } */ > diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36-1.c b/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36-1.c > new file mode 100644 > index 00000000000..872ff32f825 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36-1.c > @@ -0,0 +1,21 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target loongarch_call36_support } */ > +/* { dg-options "-mcmodel=medium -mexplicit-relocs -fdump-rtl-final -O2" } */ > +/* { dg-final { scan-assembler "test:.*pcaddu18i\t\\\$r1,%call36\\(func\\)" } } */ > +/* { dg-final { scan-assembler "test_value:.*pcaddu18i\t\\\$r1,%call36\\(func_value\\)" } } */ > + > +extern void func (void); > +int > +test (void) > +{ > + func (); > +} > + > + > +extern int func_value (void); > +float > +test_value (void) > +{ > + func_value (); > +} > + > diff --git a/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36.c b/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36.c > new file mode 100644 > index 00000000000..98ccd260df5 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/loongarch/func-call-medium-call36.c > @@ -0,0 +1,32 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target loongarch_call36_support } */ > +/* { dg-options "-mcmodel=medium -mexplicit-relocs -fdump-rtl-final -O2" } */ > +/* { dg-final { scan-rtl-dump-times "\\(clobber \\(reg:DI 12 \\\$r12\\)\\)" 3 "final" } } */ > +/* { dg-final { scan-assembler "test:.*pcaddu18i\t\\\$r12,%call36\\(func\\)" } } */ > +/* { dg-final { scan-assembler "test_value:.*pcaddu18i\t\\\$r12,%call36\\(func_value\\)" } } */ > +/* { dg-final { scan-assembler "test_multi:.*pcaddu18i\t\\\$r12,%call36\\(func_multi\\)" } } */ > + > +extern void func (void); > +void > +test (void) > +{ > + func(); > +} > + > + > +extern int func_value (void); > +int > +test_value (void) > +{ > + func_value (); > +} > + > +struct t {float a; float b;}; > + > +extern struct t func_multi (void); > +struct t > +test_multi (void) > +{ > + func_multi (); > +} > + > diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp > index b6a2e4fd096..8777e3b05e0 100644 > --- a/gcc/testsuite/lib/target-supports.exp > +++ b/gcc/testsuite/lib/target-supports.exp > @@ -13176,6 +13176,15 @@ proc check_effective_target_loongarch_asx_hw { } { > } "-mlasx"] > } > > +# Check whether LoongArch binutils supports call36 relocation. > +proc check_effective_target_loongarch_call36_support { } { > + return [check_no_compiler_messages loongarch_call36_support object { > +/* Assembly code */ > + pcaddu18i $r1,%call36(a) > + jirl $r1,$r1,0 > + } ""] > +} > + > # Appends necessary Python flags to extra-tool-flags if Python.h is supported. > # Otherwise, modifies dg-do-what. > proc dg-require-python-h { args } {