From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id 4B8803857344 for ; Fri, 6 May 2022 18:04:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 4B8803857344 Received: from mail-qv1-f71.google.com (mail-qv1-f71.google.com [209.85.219.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-534-uI-eMb_lN5e36rskFv2fOA-1; Fri, 06 May 2022 14:04:38 -0400 X-MC-Unique: uI-eMb_lN5e36rskFv2fOA-1 Received: by mail-qv1-f71.google.com with SMTP id m8-20020a0c9d08000000b00456549a0589so6542783qvf.2 for ; Fri, 06 May 2022 11:04:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:cc:references:from:in-reply-to :content-transfer-encoding; bh=CXnMSILQlwoVFwoOCm+qoU7yC+wIEjvD7VtQe3LYvjQ=; b=ej9SXxoBX5ykSWWvcrXRxmZOEP6YtKd9a79Dvjcea0st+tjLzqDvfsz+2A1q5L2BPL jX/1cgQmi1gqWjks1pWRgGFaUOq3X9WVsJ4/7e3eDxEVueLfcCr4wBbd8MQB/9O9k8x9 FiHbGaE362W/gfscSkrbC0e9Pue7oYkaNnTOXfr3qItq0NEcygqiJI/OAwJAV2QjtSL2 a3A64MNqTMeQBGCgXMz9VvRAetHkSCGmncmtixl6NLDQqMbT9JOl4imYJUdmCPZaZLtT im/ugYL+LSTYdDsgyXkEyzCk4fEkYlzz/TLghpxrdmMzWfs/1VlseRTn1ayKDd/elFMy 6Ndg== X-Gm-Message-State: AOAM531GBtoevh+ZMcdH3o+LlqyKWKtuSWUiT6uK387vIJ7f/ATjOjwy AEeCQwQrbA+ua0Vy7IhJ+uruVX1/+d/nOWapOdQM9WdsNesFUBwMvLlL+9zGuOmZJtlfS1I5sbD o3dC00bfZNncK72quhg== X-Received: by 2002:ac8:5f0a:0:b0:2f3:b18d:bad1 with SMTP id x10-20020ac85f0a000000b002f3b18dbad1mr4027607qta.150.1651860278258; Fri, 06 May 2022 11:04:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyax+eoED8PyVdzAXbbPDjFBL9Pdo4wpEop1IJ5zE9MkwrZSvBCXOQ1+JF9Ndni2eRjc9KhmA== X-Received: by 2002:ac8:5f0a:0:b0:2f3:b18d:bad1 with SMTP id x10-20020ac85f0a000000b002f3b18dbad1mr4027577qta.150.1651860277969; Fri, 06 May 2022 11:04:37 -0700 (PDT) Received: from [192.168.1.113] ([69.165.238.126]) by smtp.gmail.com with ESMTPSA id u13-20020a05622a14cd00b002f39b99f6a6sm3051531qtx.64.2022.05.06.11.04.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 06 May 2022 11:04:37 -0700 (PDT) Message-ID: <4a642b0d-a15e-cf33-6668-583b84b6ec23@redhat.com> Date: Fri, 6 May 2022 14:04:35 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [PATCH] [PR100106] Reject unaligned subregs when strict alignment is required To: Alexandre Oliva , gcc-patches@gcc.gnu.org Cc: ebotcazou@libertysurf.fr, segher@kernel.crashing.org, dje.gcc@gmail.com References: From: Vladimir Makarov In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-14.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, NICE_REPLY_A, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 May 2022 18:04:41 -0000 On 2022-05-05 02:52, Alexandre Oliva wrote: > > Regstrapped on x86_64-linux-gnu and ppc64le-linux-gnu, also tested > targeting ppc- and ppc64-vx7r2. Ok to install? > I am ok with the modified version of the patch.  It looks reasonable for me and I support its commit. But I think I can not approve the patch formally as emit-rtl.cc is out of my jurisdiction and validate_subreg is used in many places besides RA. Sorry, Alex, some global reviewer should do this. > for gcc/ChangeLog > > PR target/100106 > * emit-rtl.c (validate_subreg): Reject a SUBREG of a MEM that > requires stricter alignment than MEM's. > > for gcc/testsuite/ChangeLog > > PR target/100106 > * gcc.target/powerpc/pr100106-sa.c: New. > --- > gcc/emit-rtl.cc | 3 +++ > gcc/testsuite/gcc.target/powerpc/pr100106-sa.c | 4 ++++ > 2 files changed, 7 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/powerpc/pr100106-sa.c > > diff --git a/gcc/emit-rtl.cc b/gcc/emit-rtl.cc > index 1e02ae254d012..642e47eada0d7 100644 > --- a/gcc/emit-rtl.cc > +++ b/gcc/emit-rtl.cc > @@ -982,6 +982,9 @@ validate_subreg (machine_mode omode, machine_mode imode, > > return subreg_offset_representable_p (regno, imode, offset, omode); > } > + else if (reg && MEM_P (reg) > + && STRICT_ALIGNMENT && MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode)) > + return false; > > /* The outer size must be ordered wrt the register size, otherwise > we wouldn't know at compile time how many registers the outer > diff --git a/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c b/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c > new file mode 100644 > index 0000000000000..6cc29595c8b25 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c > @@ -0,0 +1,4 @@ > +/* { dg-do compile { target { ilp32 } } } */ > +/* { dg-options "-mcpu=604 -O -mstrict-align" } */ > + > +#include "../../gcc.c-torture/compile/pr100106.c" > >