From: Jeff Law <jeffreyalaw@gmail.com>
To: Greg McGary <gkm@rivosinc.com>, gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] combine: Don't simplify paradoxical SUBREG on WORD_REGISTER_OPERATIONS [PR113010]
Date: Thu, 29 Feb 2024 21:30:34 -0700 [thread overview]
Message-ID: <4a986781-7be8-4e45-a2d7-567d1df58ee3@gmail.com> (raw)
In-Reply-To: <20240227001736.3690294-1-gkm@rivosinc.com>
On 2/26/24 17:17, Greg McGary wrote:
> The sign-bit-copies of a sign-extending load cannot be known until runtime on
> WORD_REGISTER_OPERATIONS targets, except in the case of a zero-extending MEM
> load. See the fix for PR112758.
>
> 2024-02-22 Greg McGary <gkm@rivosinc.com>
>
> PR rtl-optimization/113010
> * combine.cc (simplify_comparison): Simplify a SUBREG on
> WORD_REGISTER_OPERATIONS targets only if it is a zero-extending
> MEM load.
>
> * gcc.c-torture/execute/pr113010.c: New test.
I think this is fine for the trunk. I'll do some final testing on it
tomorrow.
Jeff
next prev parent reply other threads:[~2024-03-01 4:30 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-27 0:17 Greg McGary
2024-02-27 15:26 ` Greg McGary
2024-03-01 4:30 ` Jeff Law [this message]
2024-03-04 16:18 ` Rainer Orth
2024-03-04 16:49 ` [PATCH] combine: Fix recent WORD_REGISTER_OPERATIONS check [PR113010] Jakub Jelinek
2024-03-04 17:59 ` Jeff Law
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