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Mon, 09 Oct 2023 13:46:05 -0700 (PDT) Received: from [172.31.0.109] ([136.36.130.248]) by smtp.gmail.com with ESMTPSA id x13-20020a170902ec8d00b001bda42a216bsm10067064plg.100.2023.10.09.13.46.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Oct 2023 13:46:05 -0700 (PDT) Message-ID: <4b7bd14f-76bd-45b7-9c3f-8ac2806eaed7@gmail.com> Date: Mon, 9 Oct 2023 14:45:59 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: xthead regression with [COMMITTED] RISC-V: const: hide mvconst splitter from IRA Content-Language: en-US To: Vineet Gupta , =?UTF-8?Q?Christoph_M=C3=BCllner?= Cc: GCC Patches , Patrick O'Neill References: <20231006182250.393162-1-vineetg@rivosinc.com> <4e2c5f07-f52e-4362-874f-907b17b9c766@rivosinc.com> From: Jeff Law In-Reply-To: <4e2c5f07-f52e-4362-874f-907b17b9c766@rivosinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_SHORT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 10/9/23 14:36, Vineet Gupta wrote: > Hi Christoph, > > On 10/9/23 12:06, Patrick O'Neill wrote: >> >> Hi Vineet, >> >> We're seeing a regression on all riscv targets after this patch:| >> >> FAIL: gcc.target/riscv/xtheadcondmov-indirect.c -O2 >> check-function-bodies ConNmv_imm_imm_reg|| >> FAIL: gcc.target/riscv/xtheadcondmov-indirect.c -O3 -g >> check-function-bodies ConNmv_imm_imm_reg >> >> Debug log output: >> body: \taddi    a[0-9]+,a[0-9]+,-1000+ >> \tli    a[0-9]+,9998336+ >> \taddi    a[0-9]+,a[0-9]+,1664+ >> \tth.mveqz    a[0-9]+,a[0-9]+,a[0-9]+ >> \tret >> >> against:     li    a5,9998336 >>     addi    a4,a0,-1000 >>     addi    a0,a5,1664 >>     th.mveqz    a0,a1,a4 >>     ret| >> >> https://github.com/patrick-rivos/gcc-postcommit-ci/issues/8 >> https://github.com/ewlu/riscv-gnu-toolchain/issues/286 >> > > It seems with my patch, exactly same instructions get out of order (for > -O2/-O3) tripping up the test results and differ from say O1 for exact > same build. > > -O2 w/ patch > ConNmv_imm_imm_reg: >     li    a5,9998336 >     addi    a4,a0,-1000 >     addi    a0,a5,1664 >     th.mveqz    a0,a1,a4 >     ret > > -O1 w/ patch > ConNmv_imm_imm_reg: >     addi    a4,a0,-1000 >     li    a5,9998336 >     addi    a0,a5,1664 >     th.mveqz    a0,a1,a4 >     ret > > I'm not sure if there is an easy way to handle that. > Is there a real reason for testing the full sequences verbatim, or is > testing number of occurrences of th.mv{eqz,nez} enough. > It seems Jeff recently added -fno-sched-pressure to avoid similar issues > but that apparently is no longer sufficient. I'd suggest doing a count test rather than an exact match. Verify you get a single li, two addis and one th.mveqz Jeff