From: Jeff Law <jeffreyalaw@gmail.com>
To: "juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>,
Li Xu <xuli1@eswincomputing.com>,
gcc-patches <gcc-patches@gcc.gnu.org>
Cc: "kito.cheng" <kito.cheng@gmail.com>, palmer <palmer@dabbelt.com>
Subject: Re: [PATCH] RISC-V: force arg and target to reg rtx under -O0
Date: Sun, 25 Jun 2023 06:50:47 -0600 [thread overview]
Message-ID: <4bd52e60-98e6-f4e1-0d0d-8cbb9ff227f4@gmail.com> (raw)
In-Reply-To: <A5C3B583106F2E1A+202306251143103544764@rivai.ai>
On 6/24/23 21:43, juzhe.zhong@rivai.ai wrote:
> Hi, Li.
> Appreciate for catching this!
>
> I think it's better:
> -emit_insn (gen_rtx_SET (gen_lowpart (e.vector_mode (), e.target), src));
> +emit_move_insn (gen_lowpart (e.vector_mode (), e.target), src);
> do this to fix this issue.
Agreed. Assuming a variant fixing it this way passes testing, it's OK
for the trunk.
jeff
prev parent reply other threads:[~2023-06-25 12:50 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-25 3:08 Li Xu
2023-06-25 3:43 ` juzhe.zhong
2023-06-25 12:50 ` Jeff Law [this message]
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