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From: Jeff Law <law@redhat.com>
To: "H.J. Lu" <hjl.tools@gmail.com>, Jan Hubicka <hubicka@ucw.cz>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
	"Pandey, Sunil K" <sunil.k.pandey@intel.com>,
	Uros Bizjak <ubizjak@gmail.com>
Subject: Re: V2 [PATCH] i386: Add pass_remove_partial_avx_dependency
Date: Wed, 28 Nov 2018 20:17:00 -0000	[thread overview]
Message-ID: <4c17a937-a770-c809-102d-d789ef0d842e@redhat.com> (raw)
In-Reply-To: <CAMe9rOpB3nj4LQ_yuFpB25bHhiv=1YEUL210f0s9DH6D3nS-EA@mail.gmail.com>

On 11/28/18 12:48 PM, H.J. Lu wrote:
> On Mon, Nov 5, 2018 at 7:29 AM Jan Hubicka <hubicka@ucw.cz> wrote:
>>
>>> On 11/5/18 7:21 AM, Jan Hubicka wrote:
>>>>>
>>>>> Did you mean "the nearest common dominator"?
>>>>
>>>> If the nearest common dominator appears in the loop while all uses are
>>>> out of loops, this will result in suboptimal xor placement.
>>>> In this case you want to split edges out of the loop.
>>>>
>>>> In general this is what the LCM framework will do for you if the problem
>>>> is modelled siimlar way as in mode_swtiching.  At entry function mode is
>>>> "no zero register needed" and all conversions need mode "zero register
>>>> needed".  Mode switching should then do the correct placement decisions
>>>> (reaching minimal number of executions of xor).
>>>>
>>>> Jeff, whan is your optinion on the approach taken by the patch?
>>>> It seems like a special case of more general issue, but I do not see
>>>> very elegant way to solve it at least in the GCC 9 horisont, so if
>>>> the placement is correct we can probalby go either with new pass or
>>>> making this part of mode swithcing (which is anyway run by x86 backend)
>>> So I haven't followed this discussion at all, but did touch on this
>>> issue with some patch a month or two ago with a target patch that was
>>> trying to avoid the partial stalls.
>>>
>>> My assumption is that we're trying to find one or more places to
>>> initialize the upper half of an avx register so as to avoid partial
>>> register stall at existing sites that set the upper half.
>>>
>>> This sounds like a classic PRE/LCM style problem (of which mode
>>> switching is just another variant).   A common-dominator approach is
>>> closer to a classic GCSE and is going to result is more initializations
>>> at sub-optimal points than a PRE/LCM style.
>>
>> yes, it is usual code placement problem. It is special case because the
>> zero register is not modified by the conversion (just we need to have
>> zero somewhere).  So basically we do not have kills to the zero except
>> for entry block.
>>
> 
> Do you have  testcase to show thatf the nearest common dominator
> in the loop, while all uses areout of loops, leads to suboptimal xor
> placement?
I don't have a testcase, but it's all but certain nearest common
dominator is going to be a suboptimal placement.  That's going to create
paths where you're going to emit the xor when it's not used.

The whole point of the LCM algorithms is they are optimal in terms of
expression evaluations.

jeff
> 

  reply	other threads:[~2018-11-28 20:17 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-19 10:31 H.J. Lu
2018-11-04 15:19 ` PING: " H.J. Lu
2018-11-05 14:21 ` Jan Hubicka
2018-11-05 14:59   ` Jeff Law
2018-11-05 15:29     ` Jan Hubicka
2018-11-28 19:49       ` H.J. Lu
2018-11-28 20:17         ` Jeff Law [this message]
2018-11-28 20:21           ` Jan Hubicka
2018-12-30 17:33             ` H.J. Lu
2019-01-11 21:06               ` Jeff Law
2018-12-30 17:10           ` H.J. Lu
2019-01-07 13:56             ` V3 " H.J. Lu
2019-01-18 15:49               ` PING^1: " H.J. Lu
2019-01-21 18:54               ` Jeff Law
2019-01-21 21:27                 ` H.J. Lu
2019-01-22 12:08                   ` Richard Biener
2019-01-22 13:28                     ` H.J. Lu
2019-01-28 17:29                       ` PING ^1: " H.J. Lu
2019-02-01 19:04                         ` [PATCH] [8/9 Regression] " H.J. Lu
2019-02-21 16:18                           ` Jan Hubicka
2019-02-21 17:43                             ` H.J. Lu

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