From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23390 invoked by alias); 17 Jul 2012 21:05:40 -0000 Received: (qmail 23375 invoked by uid 22791); 17 Jul 2012 21:05:38 -0000 X-SWARE-Spam-Status: No, hits=-2.2 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from dns1.mips.com (HELO dns1.mips.com) (12.201.5.69) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 17 Jul 2012 21:05:23 +0000 Received: from exchdb01.mips.com (exchhub01.mips.com [192.168.36.84]) by dns1.mips.com (8.13.8/8.13.8) with ESMTP id q6HL5M6L014881 for ; Tue, 17 Jul 2012 14:05:22 -0700 Received: from ubuntu-sellcey.mips.com (192.168.65.53) by exchhub01.mips.com (192.168.36.84) with Microsoft SMTP Server id 14.1.270.1; Tue, 17 Jul 2012 14:04:57 -0700 Received: by ubuntu-sellcey.mips.com (sSMTP sendmail emulation); Tue, 17 Jul 2012 14:05:19 -0700 From: "Steve Ellcey " Date: Tue, 17 Jul 2012 21:05:00 -0000 To: Subject: [Patch, mips] Fix compiler abort with -mips32r2 -mips16 -msynci User-Agent: Heirloom mailx 12.4 7/29/08 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <4e207d4c-ed56-4c66-8bfd-e2a7b5bc9e97@EXCHHUB01.MIPS.com> X-EMS-Proccessed: 6LP3oGfGVdcdb8o1aBnt6w== X-EMS-STAMP: OwqChim1YdjSlif94cPGoA== Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-07/txt/msg00774.txt.bz2 While working on my favorite mips option (-msynci) I noticed an odd thing. If I compile with '-mips32 -mips16 -msynci' I got a warning about synci not being supported but if I compiled with '-mips32r2 -mips16 -msynci' I did not get a warning, even though -mips16 mode does not support synci. Furthermore if I compiled a program that called __builtin___clear_cache with '-mips32r2 -mips16 -msynci', the compiler would abort. In mips.h we have: /* ISA includes synci, jr.hb and jalr.hb. */ #define ISA_HAS_SYNCI ((ISA_MIPS32R2 \ || ISA_MIPS64R2) \ && !TARGET_MIPS16) What I found was that in mips_option_override, where we check this macro to generate the warning we have this code at the front of the function: /* Process flags as though we were generating non-MIPS16 code. */ mips_base_mips16 = TARGET_MIPS16; target_flags &= ~MASK_MIPS16; Then later, we check ISA_HAS_SYNCI, but at that point TARGET_MIPS16 is always false because of the above lines. I looked at changing ISA_HAS_SYNCI to use target_flag_explicit but that seems like the wrong thing to do for the use of ISA_HAS_SYNCI in mips.md. Then I modified the if statement in mips_option_override but that resulted in the use of 'mips32r2 -mips16 -msynci' giving an odd warning message: warning: the ‘mips32r2’ architecture does not support the synci instruction But of course mips32r2 does support synci, it is -mips16 that does not. So I added a new if statement with an explicit check against mips_base_mips16 to give a better warning. OK to checkin? Steve Ellcey sellcey@mips.com 2012-07-17 Steve Ellcey * config/mips/mips.c (mips_option_override): Fix check for -mips16 -msynci combination of flags. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 7356ce5..889cfb5 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -16212,6 +16212,14 @@ mips_option_override (void) target_flags &= ~MASK_SYNCI; } + /* ISA_HAS_SYNCI checks TARGET_MIPS16 but that was turned off at the + beginning of this function so we need to check mips_base_mips16. */ + if (TARGET_SYNCI && mips_base_mips16) + { + warning (0, "the \'mips16\' ASE does not support the synci instruction"); + target_flags &= ~MASK_SYNCI; + } + /* Only optimize PIC indirect calls if they are actually required. */ if (!TARGET_USE_GOT || !TARGET_EXPLICIT_RELOCS) target_flags &= ~MASK_RELAX_PIC_CALLS;