* [ARM] Use UBFX for some and-immediate operations
@ 2012-08-02 16:25 Richard Earnshaw
2012-08-03 18:10 ` Richard Henderson
0 siblings, 1 reply; 3+ messages in thread
From: Richard Earnshaw @ 2012-08-02 16:25 UTC (permalink / raw)
To: gcc-patches
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This patch adds the ability to spot and exploit the UBFX instruction
(bit-field extract) to perform AND operations with an immediate which is
2^N - 1. On some benchmarks this can lead to a significant win over the
existing behaviour on Cortex-A15.
Tested on arm-eabi with some additional testing on arm-linux-gnueabi
platforms.
R.
2012-08-02 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_gen_constant): Use UBFX for some AND operations when
available.
[-- Attachment #2: bfield.patch --]
[-- Type: text/plain, Size: 1079 bytes --]
--- arm.c (revision 190101)
+++ arm.c (local)
@@ -2982,6 +2982,31 @@ arm_gen_constant (enum rtx_code code, en
return 1;
}
+ /* On targets with UXTH/UBFX, we can deal with AND (2^N)-1 in a single
+ insn. */
+ if (code == AND && (i = exact_log2 (remainder + 1)) > 0
+ && (arm_arch_thumb2 || (i == 16 && arm_arch6 && mode == SImode)))
+ {
+ if (generate)
+ {
+ if (mode == SImode && i == 16)
+ /* Use UXTH in preference to UBFX, since on Thumb2 it's a
+ smaller insn. */
+ emit_constant_insn (cond,
+ gen_zero_extendhisi2
+ (target, gen_lowpart (HImode, source)));
+ else
+ /* Extz only supports SImode, but we can coerce the operands
+ into that mode. */
+ emit_constant_insn (cond,
+ gen_extzv_t2 (gen_lowpart (mode, target),
+ gen_lowpart (mode, source),
+ GEN_INT (i), const0_rtx));
+ }
+
+ return 1;
+ }
+
/* Calculate a few attributes that may be useful for specific
optimizations. */
/* Count number of leading zeros. */
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [ARM] Use UBFX for some and-immediate operations
2012-08-02 16:25 [ARM] Use UBFX for some and-immediate operations Richard Earnshaw
@ 2012-08-03 18:10 ` Richard Henderson
2012-08-04 14:03 ` Richard Earnshaw
0 siblings, 1 reply; 3+ messages in thread
From: Richard Henderson @ 2012-08-03 18:10 UTC (permalink / raw)
To: Richard Earnshaw; +Cc: gcc-patches
On 2012-08-02 09:24, Richard Earnshaw wrote:
> + /* Extz only supports SImode, but we can coerce the operands
> + into that mode. */
> + emit_constant_insn (cond,
> + gen_extzv_t2 (gen_lowpart (mode, target),
> + gen_lowpart (mode, source),
> + GEN_INT (i), const0_rtx));
Didn't you mean gen_lowpart (SImode, ...) ?
r~
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [ARM] Use UBFX for some and-immediate operations
2012-08-03 18:10 ` Richard Henderson
@ 2012-08-04 14:03 ` Richard Earnshaw
0 siblings, 0 replies; 3+ messages in thread
From: Richard Earnshaw @ 2012-08-04 14:03 UTC (permalink / raw)
To: Richard Henderson; +Cc: gcc-patches
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On 03/08/12 19:10, Richard Henderson wrote:
> On 2012-08-02 09:24, Richard Earnshaw wrote:
>> + /* Extz only supports SImode, but we can coerce the operands
>> + into that mode. */
>> + emit_constant_insn (cond,
>> + gen_extzv_t2 (gen_lowpart (mode, target),
>> + gen_lowpart (mode, source),
>> + GEN_INT (i), const0_rtx));
>
> Didn't you mean gen_lowpart (SImode, ...) ?
>
>
> r~
>
Urm, yes. Well spotted.
Fixed thusly:
2012-08-04 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_gen_constant): Use SImode when preparing operands for
gen_extzv_t2.
[-- Attachment #2: bfield2.patch --]
[-- Type: text/plain, Size: 471 bytes --]
--- arm.c (revision 190143)
+++ arm.c (local)
@@ -2999,8 +2999,8 @@ arm_gen_constant (enum rtx_code code, en
/* Extz only supports SImode, but we can coerce the operands
into that mode. */
emit_constant_insn (cond,
- gen_extzv_t2 (gen_lowpart (mode, target),
- gen_lowpart (mode, source),
+ gen_extzv_t2 (gen_lowpart (SImode, target),
+ gen_lowpart (SImode, source),
GEN_INT (i), const0_rtx));
}
^ permalink raw reply [flat|nested] 3+ messages in thread
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