From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 17518 invoked by alias); 14 Jan 2013 13:53:05 -0000 Received: (qmail 17500 invoked by uid 22791); 14 Jan 2013 13:53:04 -0000 X-SWARE-Spam-Status: No, hits=-5.1 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_DNSWL_HI,RCVD_IN_HOSTKARMA_W,SPF_SOFTFAIL X-Spam-Check-By: sourceware.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (208.118.235.92) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 14 Jan 2013 13:52:53 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tuhj8-0006MU-IV for gcc-patches@gcc.gnu.org; Mon, 14 Jan 2013 05:57:22 -0500 Received: from service88.mimecast.com ([195.130.217.12]:60344) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tuhj8-0006MH-92 for gcc-patches@gcc.gnu.org; Mon, 14 Jan 2013 05:57:14 -0500 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Mon, 14 Jan 2013 10:52:57 +0000 Received: from [10.1.79.66] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.0); Mon, 14 Jan 2013 10:52:55 +0000 Message-ID: <50F3E386.1010207@arm.com> Date: Mon, 14 Jan 2013 13:53:00 -0000 From: Tejas Belagod User-Agent: Thunderbird 2.0.0.18 (X11/20081120) MIME-Version: 1.0 To: Marcus Shawcroft CC: "gcc-patches@gcc.gnu.org" Subject: Re: [PING][Patch, AArch64-4.7] Implement support for LD1R. References: <50ED9CAB.7060500@arm.com> In-Reply-To: <50ED9CAB.7060500@arm.com> X-MC-Unique: 113011410525704301 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 195.130.217.12 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2013-01/txt/msg00678.txt.bz2 PING. Tejas Belagod wrote: > Hi, >=20 > Attached is a patch that implements support for AdvSIMD instruction LD1R. >=20 > Tested on aarch64-none-elf. OK to commit on aarch64-4.7-branch? >=20 > Thanks, > Tejas Belagod > ARM. >=20 > 2013-01-09 Tejas Belagod >=20 > gcc/ > * config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r): New. > * config/aarch64/iterators.md (VALLDI): New. >=20 > testsuite/ > * gcc.target/aarch64/aarch64/vect-ld1r-compile-fp.c: New. > * gcc.target/aarch64/vect-ld1r-compile.c: New. > * gcc.target/aarch64/vect-ld1r-fp.c: New. > * gcc.target/aarch64/vect-ld1r.c: New. > * gcc.target/aarch64/vect-ld1r.x: New. >=20