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Date: Mon, 14 Jan 2013 17:09:00 -0000
From: Marcus Shawcroft <marcus.shawcroft@arm.com>
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To: Tejas Belagod <Tejas.Belagod@arm.com>
CC: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Subject: Re: [Patch, AArch64] Implement support for LD1R.
References: <50ED9DA1.9000205@arm.com>
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On 09/01/13 16:41, Tejas Belagod wrote:
> Hi,
>
> Attached is a patch that implements support for AdvSIMD instruction LD1R.
>
> Tested on aarch64-none-elf. OK for trunk?
>
> Thanks,
> Tejas Belagod
> ARM.
>
> 2013-01-09  Tejas Belagod  <tejas.belagod@arm.com>
>
> gcc/
> 	* config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r<mode>): New.
> 	* config/aarch64/iterators.md (VALLDI): New.
>
> testsuite/
> 	* gcc.target/aarch64/aarch64/vect-ld1r-compile-fp.c: New.
> 	* gcc.target/aarch64/vect-ld1r-compile.c: New.
> 	* gcc.target/aarch64/vect-ld1r-fp.c: New.
> 	* gcc.target/aarch64/vect-ld1r.c: New.
> 	* gcc.target/aarch64/vect-ld1r.x: New.
>

OK
/Marcus