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From: Georg-Johann Lay <avr@gjlay.de>
To: Gerald Pfeifer <gerald@pfeifer.com>
Cc: gcc-patches@gcc.gnu.org, Denis Chertykov <chertykov@gmail.com>,
	 Eric Weddington <eric.weddington@atmel.com>
Subject: Re: [avr,committed] Fix fixed-point conversion
Date: Mon, 28 Jan 2013 13:46:00 -0000	[thread overview]
Message-ID: <5106810C.10106@gjlay.de> (raw)
In-Reply-To: <alpine.LNX.2.00.1301272320300.2277@tuna.site>

Gerald Pfeifer wrote:
> On Thu, 24 Jan 2013, Georg-Johann Lay wrote:
>> Committed the following change:
>>
>> http://gcc.gnu.org/r195424
>>
>> 	* config/avr/avr.c (avr_out_fract): Make register numbers that
>> 	might be outside of source operand signed.
> 
> Can you still post patches to the list, and not just the reference?
> 
> Thanks,
> Gerald


Thinks for pointing this out.  I will follow the guideline in the future.

Here is the change:

Index: config/avr/avr.c
===================================================================
--- config/avr/avr.c    (revision 195423)
+++ config/avr/avr.c    (revision 195424)
@@ -7114,13 +7114,13 @@ avr_out_fract (rtx insn, rtx operands[],
       unsigned d1 = d0 + step;

       // Current and next regno of source
-      unsigned s0 = d0 - offset;
-      unsigned s1 = s0 + step;
+      signed s0 = d0 - offset;
+      signed s1 = s0 + step;

       // Must current resp. next regno be CLRed?  This applies to the low
       // bytes of the destination that have no associated source bytes.
-      bool clr0 = s0 < src.regno;
-      bool clr1 = s1 < src.regno && d1 >= dest.regno;
+      bool clr0 = s0 < (signed) src.regno;
+      bool clr1 = s1 < (signed) src.regno && d1 >= dest.regno;

       // First gather what code to emit (if any) and additional step to
       // apply if a MOVW is in use.  xop[2] is destination rtx and xop[3]
@@ -7150,12 +7150,12 @@ avr_out_fract (rtx insn, rtx operands[],
                 }
             }
         }
-      else if (offset && s0 <= src.regno_msb)
+      else if (offset && s0 <= (signed) src.regno_msb)
         {
           int movw = AVR_HAVE_MOVW && offset % 2 == 0
             && d0 % 2 == (offset > 0)
             && d1 <= dest.regno_msb && d1 >= dest.regno
-            && s1 <= src.regno_msb  && s1 >= src.regno;
+            && s1 <= (signed) src.regno_msb  && s1 >= (signed) src.regno;

           xop[2] = all_regs_rtx[d0 & ~movw];
           xop[3] = all_regs_rtx[s0 & ~movw];

      reply	other threads:[~2013-01-28 13:46 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-24 13:40 Georg-Johann Lay
2013-01-27 22:21 ` Gerald Pfeifer
2013-01-28 13:46   ` Georg-Johann Lay [this message]

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