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From: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
To: Christophe LYON <christophe.lyon@foss.st.com>, gcc-patches@gcc.gnu.org
Subject: Re: [PATCH 04/13] arm: Add GENERAL_AND_VPR_REGS regclass
Date: Tue, 7 Sep 2021 14:35:57 +0100	[thread overview]
Message-ID: <51e7e252-8f92-95ef-243a-6a211f90ba2f@foss.arm.com> (raw)
In-Reply-To: <ac7b9ab3-b805-67c3-a967-cc95ab6cdc3c@foss.st.com>



On 07/09/2021 13:05, Christophe LYON wrote:
> 
> On 07/09/2021 11:42, Richard Earnshaw wrote:
>>
>>
>> On 07/09/2021 10:15, Christophe Lyon via Gcc-patches wrote:
>>> At some point during the development of this patch series, it appeared
>>> that in some cases the register allocator wants “VPR or general”
>>> rather than “VPR or general or FP” (which is the same thing as
>>> ALL_REGS).  The series does not seem to require this anymore, but it
>>> seems to be a good thing to do anyway, to give the register allocator
>>> more freedom.
>>>
>>> 2021-09-01  Christophe Lyon  <christophe.lyon@foss.st.com>
>>>
>>>     gcc/
>>>     * config/arm/arm.h (reg_class): Add GENERAL_AND_VPR_REGS.
>>>     (REG_CLASS_NAMES): Likewise.
>>>     (REG_CLASS_CONTENTS): Likewise. Add VPR_REG to ALL_REGS.
>>>
>>> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
>>> index 015299c1534..fab39d05916 100644
>>> --- a/gcc/config/arm/arm.h
>>> +++ b/gcc/config/arm/arm.h
>>> @@ -1286,6 +1286,7 @@ enum reg_class
>>>     SFP_REG,
>>>     AFP_REG,
>>>     VPR_REG,
>>> +  GENERAL_AND_VPR_REGS,
>>>     ALL_REGS,
>>>     LIM_REG_CLASSES
>>>   };
>>> @@ -1315,6 +1316,7 @@ enum reg_class
>>>     "SFP_REG",        \
>>>     "AFP_REG",        \
>>>     "VPR_REG",        \
>>> +  "GENERAL_AND_VPR_REGS", \
>>>     "ALL_REGS"        \
>>>   }
>>>   @@ -1343,7 +1345,8 @@ enum reg_class
>>>     { 0x00000000, 0x00000000, 0x00000000, 0x00000040 }, /* SFP_REG 
>>> */    \
>>>     { 0x00000000, 0x00000000, 0x00000000, 0x00000080 }, /* AFP_REG 
>>> */    \
>>>     { 0x00000000, 0x00000000, 0x00000000, 0x00000400 }, /* VPR_REG. 
>>> */    \
>>> -  { 0xFFFF7FFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000000F }  /* ALL_REGS. 
>>> */    \
>>> +  { 0x00005FFF, 0x00000000, 0x00000000, 0x00000400 }, /* 
>>> GENERAL_AND_VPR_REGS.  */ \
>>> +  { 0xFFFF7FFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x0000040F }  /* ALL_REGS. 
>>> */    \
>>>   }
>>
>> You've changed the definition of ALL_REGS here (to include VPR_REG), 
>> but not really explained why.  Is that the source of the underlying 
>> issue with the 'appeared' you mention?
> 
> 
> I first added VPR_REG to ALL_REGS, but Richard Sandiford suggested I 
> create a new GENERAL_AND_VPR_REGS that would be more restrictive. I did 
> not remove VPR_REG from ALL_REGS because I thought it was an omission: 
> shouldn't ALL_REGS contain all registers?

Surely that should be a separate patch then.

R.

> 
> 
>>
>> R.
>>
>>
>>>     #define FP_SYSREGS \
>>>

  reply	other threads:[~2021-09-07 13:35 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-07  9:15 [PATCH 00/13] ARM/MVE use vectors of boolean for predicates Christophe Lyon
2021-09-07  9:15 ` [PATCH 01/13] arm: Add new tests for comparison vectorization with Neon and MVE Christophe Lyon
2021-09-28 11:11   ` Kyrylo Tkachov
2021-09-07  9:15 ` [PATCH 02/13] arm: Add tests for PR target/100757 Christophe Lyon
2021-09-28 11:12   ` Kyrylo Tkachov
2021-09-28 13:28     ` Christophe LYON
2021-09-07  9:15 ` [PATCH 03/13] arm: Add test for PR target/101325 Christophe Lyon
2021-09-28 11:14   ` Kyrylo Tkachov
2021-09-28 13:30     ` Christophe LYON
2021-10-11 12:43       ` Christophe LYON
2021-09-07  9:15 ` [PATCH 04/13] arm: Add GENERAL_AND_VPR_REGS regclass Christophe Lyon
2021-09-07  9:42   ` Richard Earnshaw
2021-09-07 12:05     ` Christophe LYON
2021-09-07 13:35       ` Richard Earnshaw [this message]
2021-09-08  7:48         ` Christophe LYON
2021-09-28 11:18           ` Kyrylo Tkachov
2021-09-28 13:32             ` Christophe LYON
2021-10-11 12:44               ` Christophe LYON
2021-09-13  8:33 ` [PATCH 00/13] ARM/MVE use vectors of boolean for predicates Christophe LYON
2021-09-20  9:21   ` Christophe LYON

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