Hi,

This patch by James Greenhalgh fixes "by-lane" patterns broken by
previous patches.

Regression tested on aarch64-none-elf and aarch64_be-none-elf
with no unexpected issues.

OK?

Thanks,
Alex

---
gcc/

2014-01-16  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-simd.md
	(aarch64_dup_lane<mode>): Correct lane number on big-endian.
	(aarch64_dup_lane_<vswap_widthi_name><mode>): Likewise.
	(*aarch64_mul3_elt<mode>): Likewise.
	(*aarch64_mul3_elt<vswap_width_name><mode>): Likewise.
	(*aarch64_mul3_elt_to_64v2df): Likewise.
	(*aarch64_mla_elt<mode>): Likewise.
	(*aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
	(*aarch64_mls_elt<mode>): Likewise.
	(*aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
	(*aarch64_fma4_elt<mode>): Likewise.
	(*aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
	(*aarch64_fma4_elt_to_64v2df): Likewise.
	(*aarch64_fnma4_elt<mode>): Likewise.
	(*aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
	(*aarch64_fnma4_elt_to_64v2df): Likewise.
	(aarch64_sq<r>dmulh_lane<mode>): Likewise.
	(aarch64_sq<r>dmulh_laneq<mode>): Likewise.
	(aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal): Likewise.
	(aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal): Likewise.
	(aarch64_sqdml<SBINQOPS:as>l2_lane<mode>_internal): Likewise.
	(aarch64_sqdmull_lane<mode>_internal): Likewise.
	(aarch64_sqdmull2_lane<mode>_internal): Likewise.