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From: Alex Velenko <Alex.Velenko@arm.com>
To: "pinskia@gmail.com" <pinskia@gmail.com>
Cc: James Greenhalgh <James.Greenhalgh@arm.com>,
	       Marcus Shawcroft <Marcus.Shawcroft@arm.com>,
	       GCC Patches <gcc-patches@gcc.gnu.org>,
	       Richard Earnshaw <Richard.Earnshaw@arm.com>,
	       Tejas Belagod <Tejas.Belagod@arm.com>
Subject: Re: [Patch AArch64] Implement Vector Permute Support
Date: Thu, 16 Jan 2014 14:43:00 -0000	[thread overview]
Message-ID: <52D7F00D.1030206@arm.com> (raw)
In-Reply-To: <15698059-D4C6-4499-A3B2-6C88BDDAFC5E@gmail.com>

[-- Attachment #1: Type: text/plain, Size: 2074 bytes --]

On 14/01/14 15:51, pinskia@gmail.com wrote:
>
>
>> On Jan 14, 2014, at 7:19 AM, Alex Velenko <Alex.Velenko@arm.com> wrote:
>>
>> Hi,
>>
>> This patch turns off the vec_perm patterns for aarch64_be, this should resolve
>> the issue  highlighted here http://gcc.gnu.org/ml/gcc-patches/2014-01/msg00321.html
>> With this patch applied, the test case provided in that link compiles without an ICE.
>>
>> However, the Big-Endian port is still in development. This patch exposes
>> another known but unrelated issue with Big-Endian Large-Int modes.
>>
>> The patch has been tested on aarch64-none-elf and aarch64_be-none-elf resulting in five
>> further regression due to the broken implementation of Big-Endian Large-Int modes.
>>
>> Kind regards,
>> Alex Velenko
>>
>> gcc/
>>
>> 2014-01-14  Alex Velenko  <Alex.Velenko@arm.com>
>>
>>     * config/aarch64/aarch64-simd.md (vec_perm<mode>): Add BE check.
>>     * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Add comment.
>>
>> gcc/testsuite/
>>
>> 2014-01-14  Alex Velenko  <Alex.Velenko@arm.com>
>>
>>     * lib/target-supports.exp
>>     (check_effective_target_vect_perm): Exclude aarch64_be.
>>     (check_effective_target_vect_perm_byte): Likewise.
>>     (check_effective_target_vect_perm_short): Likewise.
>
> I think you want to use a function to check if the target is effectively big-endian instead.  Internally at Cavium, our elf compiler has big-endian multi-lib.
>
> Thanks,
> Andrew
>
>>
>> <vec-perm.patch>
>

Hi,
Here is a vec-perm patch with changes proposed previously.
Little and Big-Endian tested with no additional issues appearing.

Kind regards,
Alex

gcc/

2014-01-16  Alex Velenko  <Alex.Velenko@arm.com>

	* config/aarch64/aarch64-simd.md (vec_perm<mode>): Add BE check.
	* config/aarch64/aarch64.c (aarch64_expand_vec_perm): Add comment.

gcc/testsuite/

2014-01-16  Alex Velenko  <Alex.Velenko@arm.com>

	* lib/target-supports.exp
	(check_effective_target_vect_perm): Exclude aarch64_be.
	(check_effective_target_vect_perm_byte): Likewise.
	(check_effective_target_vect_perm_short): Likewise.

[-- Attachment #2: Vect-perm2.patch --]
[-- Type: text/x-patch, Size: 2123 bytes --]

diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index bc47a291de4b9b24d829e4dbf060fff7a321558f..43a9c5b27d78a47cf965636a03232005a4c8e7c3 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -3840,7 +3840,7 @@
    (match_operand:VB 1 "register_operand")
    (match_operand:VB 2 "register_operand")
    (match_operand:VB 3 "register_operand")]
-  "TARGET_SIMD"
+  "TARGET_SIMD && !BYTES_BIG_ENDIAN"
 {
   aarch64_expand_vec_perm (operands[0], operands[1],
 			   operands[2], operands[3]);
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 159f88f28dd838d4aee6d75f8d21897695609c49..b425183c1e893c6511ba575a0cd416563c9510be 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3436,7 +3436,8 @@ proc check_effective_target_vect_perm { } {
     } else {
         set et_vect_perm_saved 0
         if { [is-effective-target arm_neon_ok]
-	     || [istarget aarch64*-*-*]
+	     || ([istarget aarch64*-*-*]
+		 && [is-effective-target aarch64_little_endian])
 	     || [istarget powerpc*-*-*]
              || [istarget spu-*-*]
 	     || [istarget i?86-*-*]
@@ -3464,7 +3465,8 @@ proc check_effective_target_vect_perm_byte { } {
         set et_vect_perm_byte_saved 0
         if { ([is-effective-target arm_neon_ok]
 	      && [is-effective-target arm_little_endian])
-	     || [istarget aarch64*-*-*]
+	     || ([istarget aarch64*-*-*]
+		 && [is-effective-target aarch64_little_endian])
 	     || [istarget powerpc*-*-*]
              || [istarget spu-*-*] } {
             set et_vect_perm_byte_saved 1
@@ -3488,7 +3490,8 @@ proc check_effective_target_vect_perm_short { } {
         set et_vect_perm_short_saved 0
         if { ([is-effective-target arm_neon_ok]
 	      && [is-effective-target arm_little_endian])
-	     || [istarget aarch64*-*-*]
+	     || ([istarget aarch64*-*-*]
+		 && [is-effective-target aarch64_little_endian])
 	     || [istarget powerpc*-*-*]
              || [istarget spu-*-*] } {
             set et_vect_perm_short_saved 1

  reply	other threads:[~2014-01-16 14:43 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-12-04 10:31 James Greenhalgh
2012-12-04 10:36 ` [Patch AArch64] Add zip{1, 2}, uzp{1, 2}, trn{1, 2} support for vector permute James Greenhalgh
2012-12-04 22:45   ` Marcus Shawcroft
2012-12-04 22:44 ` [Patch AArch64] Implement Vector Permute Support Marcus Shawcroft
2012-12-06 16:25   ` James Greenhalgh
2014-01-07 23:10 ` Andrew Pinski
     [not found]   ` <72A61951-68B2-4776-A2B8-05DC4E1F53A7@arm.com>
2014-01-08  0:10     ` Andrew Pinski
2014-01-08 11:00       ` James Greenhalgh
2014-01-14 15:19         ` Alex Velenko
2014-01-14 15:51           ` pinskia
2014-01-16 14:43             ` Alex Velenko [this message]
2014-01-17 15:55               ` Richard Earnshaw
2014-01-20 11:15                 ` Alex Velenko
2014-01-20 11:17                   ` Richard Earnshaw
2014-01-20 17:33                     ` Alex Velenko
2014-01-20 18:36                       ` Marcus Shawcroft

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