From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 20468 invoked by alias); 16 Jan 2014 14:43:33 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 20455 invoked by uid 89); 16 Jan 2014 14:43:32 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.7 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: cam-smtp0.cambridge.arm.com Received: from fw-tnat.cambridge.arm.com (HELO cam-smtp0.cambridge.arm.com) (217.140.96.21) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Thu, 16 Jan 2014 14:43:29 +0000 Received: from [10.1.207.145] (e104458-lin.cambridge.arm.com [10.1.207.145]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id s0GEhPVM006041; Thu, 16 Jan 2014 14:43:25 GMT Message-ID: <52D7F00D.1030206@arm.com> Date: Thu, 16 Jan 2014 14:43:00 -0000 From: Alex Velenko User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130804 Thunderbird/17.0.8 MIME-Version: 1.0 To: "pinskia@gmail.com" CC: James Greenhalgh , Marcus Shawcroft , GCC Patches , Richard Earnshaw , Tejas Belagod Subject: Re: [Patch AArch64] Implement Vector Permute Support References: <1354617087-31993-1-git-send-email-james.greenhalgh@arm.com> <72A61951-68B2-4776-A2B8-05DC4E1F53A7@arm.com> <20140108105959.GA26808@arm.com> <52D5558E.7040609@arm.com> <15698059-D4C6-4499-A3B2-6C88BDDAFC5E@gmail.com> In-Reply-To: <15698059-D4C6-4499-A3B2-6C88BDDAFC5E@gmail.com> Content-Type: multipart/mixed; boundary="------------050709030605050507030707" X-IsSubscribed: yes X-SW-Source: 2014-01/txt/msg00988.txt.bz2 This is a multi-part message in MIME format. --------------050709030605050507030707 Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Content-length: 2074 On 14/01/14 15:51, pinskia@gmail.com wrote: > > >> On Jan 14, 2014, at 7:19 AM, Alex Velenko wrote: >> >> Hi, >> >> This patch turns off the vec_perm patterns for aarch64_be, this should resolve >> the issue highlighted here http://gcc.gnu.org/ml/gcc-patches/2014-01/msg00321.html >> With this patch applied, the test case provided in that link compiles without an ICE. >> >> However, the Big-Endian port is still in development. This patch exposes >> another known but unrelated issue with Big-Endian Large-Int modes. >> >> The patch has been tested on aarch64-none-elf and aarch64_be-none-elf resulting in five >> further regression due to the broken implementation of Big-Endian Large-Int modes. >> >> Kind regards, >> Alex Velenko >> >> gcc/ >> >> 2014-01-14 Alex Velenko >> >> * config/aarch64/aarch64-simd.md (vec_perm): Add BE check. >> * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Add comment. >> >> gcc/testsuite/ >> >> 2014-01-14 Alex Velenko >> >> * lib/target-supports.exp >> (check_effective_target_vect_perm): Exclude aarch64_be. >> (check_effective_target_vect_perm_byte): Likewise. >> (check_effective_target_vect_perm_short): Likewise. > > I think you want to use a function to check if the target is effectively big-endian instead. Internally at Cavium, our elf compiler has big-endian multi-lib. > > Thanks, > Andrew > >> >> > Hi, Here is a vec-perm patch with changes proposed previously. Little and Big-Endian tested with no additional issues appearing. Kind regards, Alex gcc/ 2014-01-16 Alex Velenko * config/aarch64/aarch64-simd.md (vec_perm): Add BE check. * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Add comment. gcc/testsuite/ 2014-01-16 Alex Velenko * lib/target-supports.exp (check_effective_target_vect_perm): Exclude aarch64_be. (check_effective_target_vect_perm_byte): Likewise. (check_effective_target_vect_perm_short): Likewise. --------------050709030605050507030707 Content-Type: text/x-patch; name="Vect-perm2.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="Vect-perm2.patch" Content-length: 2123 diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index bc47a291de4b9b24d829e4dbf060fff7a321558f..43a9c5b27d78a47cf965636a03232005a4c8e7c3 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -3840,7 +3840,7 @@ (match_operand:VB 1 "register_operand") (match_operand:VB 2 "register_operand") (match_operand:VB 3 "register_operand")] - "TARGET_SIMD" + "TARGET_SIMD && !BYTES_BIG_ENDIAN" { aarch64_expand_vec_perm (operands[0], operands[1], operands[2], operands[3]); diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 159f88f28dd838d4aee6d75f8d21897695609c49..b425183c1e893c6511ba575a0cd416563c9510be 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -3436,7 +3436,8 @@ proc check_effective_target_vect_perm { } { } else { set et_vect_perm_saved 0 if { [is-effective-target arm_neon_ok] - || [istarget aarch64*-*-*] + || ([istarget aarch64*-*-*] + && [is-effective-target aarch64_little_endian]) || [istarget powerpc*-*-*] || [istarget spu-*-*] || [istarget i?86-*-*] @@ -3464,7 +3465,8 @@ proc check_effective_target_vect_perm_byte { } { set et_vect_perm_byte_saved 0 if { ([is-effective-target arm_neon_ok] && [is-effective-target arm_little_endian]) - || [istarget aarch64*-*-*] + || ([istarget aarch64*-*-*] + && [is-effective-target aarch64_little_endian]) || [istarget powerpc*-*-*] || [istarget spu-*-*] } { set et_vect_perm_byte_saved 1 @@ -3488,7 +3490,8 @@ proc check_effective_target_vect_perm_short { } { set et_vect_perm_short_saved 0 if { ([is-effective-target arm_neon_ok] && [is-effective-target arm_little_endian]) - || [istarget aarch64*-*-*] + || ([istarget aarch64*-*-*] + && [is-effective-target aarch64_little_endian]) || [istarget powerpc*-*-*] || [istarget spu-*-*] } { set et_vect_perm_short_saved 1 --------------050709030605050507030707--