* [PATCH-2v3, rs6000] Implement 32bit inline lrint [PR88558]
@ 2023-09-25 2:05 HAO CHEN GUI
2023-09-27 5:08 ` Kewen.Lin
0 siblings, 1 reply; 2+ messages in thread
From: HAO CHEN GUI @ 2023-09-25 2:05 UTC (permalink / raw)
To: gcc-patches; +Cc: Segher Boessenkool, David, Kewen.Lin, Peter Bergner
Hi,
This patch implements 32bit inline lrint by "fctiw". It depends on
the patch1 to do SImode move from FP registers on P7.
Compared to last version, the main change is to add some test cases.
https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629187.html
Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
Thanks
Gui Haochen
ChangeLog
rs6000: support 32bit inline lrint
gcc/
PR target/88558
* config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
from insn condition.
(lrint<mode>si2): New insn pattern for 32bit lrint.
gcc/testsuite/
PR target/106769
* gcc.target/powerpc/pr88558.h: New.
* gcc.target/powerpc/pr88558-p7.c: New.
* gcc.target/powerpc/pr88558-p8.c: New.
patch.diff
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ac5d29a2cf8..a41898e0e08 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -6655,10 +6655,18 @@ (define_insn "lrint<mode>di2"
[(set (match_operand:DI 0 "gpc_reg_operand" "=d")
(unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]
UNSPEC_FCTID))]
- "TARGET_HARD_FLOAT && TARGET_FPRND"
+ "TARGET_HARD_FLOAT"
"fctid %0,%1"
[(set_attr "type" "fp")])
+(define_insn "lrint<mode>si2"
+ [(set (match_operand:SI 0 "gpc_reg_operand" "=d")
+ (unspec:SI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]
+ UNSPEC_FCTIW))]
+ "TARGET_HARD_FLOAT && TARGET_POPCNTD"
+ "fctiw %0,%1"
+ [(set_attr "type" "fp")])
+
(define_insn "btrunc<mode>2"
[(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,wa")
(unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "d,wa")]
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
new file mode 100644
index 00000000000..3932656c5fd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-math-errno -mdejagnu-cpu=power7" } */
+
+/* -fno-math-errno is required to make {i,l,ll}rint{,f} inlined */
+
+#include "pr88558.h"
+
+/* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfctiw\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfctiw\M} 4 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M} 4 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c b/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c
new file mode 100644
index 00000000000..1afc8fd4f0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-O2 -fno-math-errno -mdejagnu-cpu=power8" } */
+
+/* -fno-math-errno is required to make {i,l,ll}rint{,f} inlined */
+
+#include "pr88558.h"
+
+/* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfctiw\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfctiw\M} 4 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mmfvsrwz\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mmfvsrwz\M} 4 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558.h b/gcc/testsuite/gcc.target/powerpc/pr88558.h
new file mode 100644
index 00000000000..9c604faadd1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88558.h
@@ -0,0 +1,29 @@
+long int test1 (double a)
+{
+ return __builtin_lrint (a);
+}
+
+long long test2 (double a)
+{
+ return __builtin_llrint (a);
+}
+
+int test3 (double a)
+{
+ return __builtin_irint (a);
+}
+
+long int test4 (float a)
+{
+ return __builtin_lrintf (a);
+}
+
+long long test5 (float a)
+{
+ return __builtin_llrintf (a);
+}
+
+int test6 (float a)
+{
+ return __builtin_irintf (a);
+}
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH-2v3, rs6000] Implement 32bit inline lrint [PR88558]
2023-09-25 2:05 [PATCH-2v3, rs6000] Implement 32bit inline lrint [PR88558] HAO CHEN GUI
@ 2023-09-27 5:08 ` Kewen.Lin
0 siblings, 0 replies; 2+ messages in thread
From: Kewen.Lin @ 2023-09-27 5:08 UTC (permalink / raw)
To: HAO CHEN GUI; +Cc: Segher Boessenkool, David, Peter Bergner, gcc-patches
Hi,
on 2023/9/25 10:05, HAO CHEN GUI wrote:
> Hi,
> This patch implements 32bit inline lrint by "fctiw". It depends on
> the patch1 to do SImode move from FP registers on P7.
>
> Compared to last version, the main change is to add some test cases.
> https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629187.html
>
> Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
>
This patch is ok for trunk, thanks!
BR,
Kewen
> Thanks
> Gui Haochen
>
> ChangeLog
> rs6000: support 32bit inline lrint
>
> gcc/
> PR target/88558
> * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
> from insn condition.
> (lrint<mode>si2): New insn pattern for 32bit lrint.
>
> gcc/testsuite/
> PR target/106769
> * gcc.target/powerpc/pr88558.h: New.
> * gcc.target/powerpc/pr88558-p7.c: New.
> * gcc.target/powerpc/pr88558-p8.c: New.
>
> patch.diff
> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
> index ac5d29a2cf8..a41898e0e08 100644
> --- a/gcc/config/rs6000/rs6000.md
> +++ b/gcc/config/rs6000/rs6000.md
> @@ -6655,10 +6655,18 @@ (define_insn "lrint<mode>di2"
> [(set (match_operand:DI 0 "gpc_reg_operand" "=d")
> (unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]
> UNSPEC_FCTID))]
> - "TARGET_HARD_FLOAT && TARGET_FPRND"
> + "TARGET_HARD_FLOAT"
> "fctid %0,%1"
> [(set_attr "type" "fp")])
>
> +(define_insn "lrint<mode>si2"
> + [(set (match_operand:SI 0 "gpc_reg_operand" "=d")
> + (unspec:SI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]
> + UNSPEC_FCTIW))]
> + "TARGET_HARD_FLOAT && TARGET_POPCNTD"
> + "fctiw %0,%1"
> + [(set_attr "type" "fp")])
> +
> (define_insn "btrunc<mode>2"
> [(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,wa")
> (unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "d,wa")]
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
> new file mode 100644
> index 00000000000..3932656c5fd
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
> @@ -0,0 +1,13 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -fno-math-errno -mdejagnu-cpu=power7" } */
> +
> +/* -fno-math-errno is required to make {i,l,ll}rint{,f} inlined */
> +
> +#include "pr88558.h"
> +
> +/* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target ilp32 } } } */
> +/* { dg-final { scan-assembler-times {\mfctiw\M} 2 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {\mfctiw\M} 4 { target ilp32 } } } */
> +/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {\mstfiwx\M} 4 { target ilp32 } } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c b/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c
> new file mode 100644
> index 00000000000..1afc8fd4f0d
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c
> @@ -0,0 +1,14 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target powerpc_p8vector_ok } */
> +/* { dg-options "-O2 -fno-math-errno -mdejagnu-cpu=power8" } */
> +
> +/* -fno-math-errno is required to make {i,l,ll}rint{,f} inlined */
> +
> +#include "pr88558.h"
> +
> +/* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target ilp32 } } } */
> +/* { dg-final { scan-assembler-times {\mfctiw\M} 2 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {\mfctiw\M} 4 { target ilp32 } } } */
> +/* { dg-final { scan-assembler-times {\mmfvsrwz\M} 2 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {\mmfvsrwz\M} 4 { target ilp32 } } } */
> diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558.h b/gcc/testsuite/gcc.target/powerpc/pr88558.h
> new file mode 100644
> index 00000000000..9c604faadd1
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/pr88558.h
> @@ -0,0 +1,29 @@
> +long int test1 (double a)
> +{
> + return __builtin_lrint (a);
> +}
> +
> +long long test2 (double a)
> +{
> + return __builtin_llrint (a);
> +}
> +
> +int test3 (double a)
> +{
> + return __builtin_irint (a);
> +}
> +
> +long int test4 (float a)
> +{
> + return __builtin_lrintf (a);
> +}
> +
> +long long test5 (float a)
> +{
> + return __builtin_llrintf (a);
> +}
> +
> +int test6 (float a)
> +{
> + return __builtin_irintf (a);
> +}
^ permalink raw reply [flat|nested] 2+ messages in thread
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