This patch (borrowing heavily from the ARM backend) makes 
aarch64_expand_vec_perm_const output REV instructions when appropriate,
and then implements the vrev_XXX intrinsics in terms of __builtin_shuffle (which
now produces the same assembly instructions).

No regressions (and tests in previous patch 
http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01468.html still passing) on 
aarch64-none-elf; also on aarch64_be-none-elf, where there are
no regressions following testsuite config changes in
http://gcc.gnu.org/ml/gcc-patches/2014-04/msg00579.html, but some "noise" (due
to unexpected success in vectorization) without that patch.

gcc/ChangeLog:
2014-04-23  Alan Lawrence  <alan.lawrence@arm.com>

	* config/aarch64/iterators.md: add a REVERSE iterator and rev_op
	attribute for REV64/32/16 insns.
	* config/aarch64/aarch64-simd.md: add corresponding define_insn
	parameterized by REVERSE iterator.
	* config/aarch64/aarch64.c (aarch64_evpc_rev): recognize REVnn patterns.
	(aarch64_expand_vec_perm_const_1): call aarch64_evpc_rev also.
	* config/aarch64/arm_neon.h (vrev{16,32,64}[q]_{s,p,u,f}{8,16,32}): rewrite to
	use __builtin_shuffle.