From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 16677 invoked by alias); 17 Jun 2014 22:22:10 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 16665 invoked by uid 89); 17 Jun 2014 22:22:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.2 X-HELO: homiemail-a91.g.dreamhost.com Received: from sub5.mail.dreamhost.com (HELO homiemail-a91.g.dreamhost.com) (208.113.200.129) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 17 Jun 2014 22:22:09 +0000 Received: from homiemail-a91.g.dreamhost.com (localhost [127.0.0.1]) by homiemail-a91.g.dreamhost.com (Postfix) with ESMTP id 97B72AE05B; Tue, 17 Jun 2014 15:22:07 -0700 (PDT) Received: from redwood.eagercon.com (c-24-7-16-38.hsd1.ca.comcast.net [24.7.16.38]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: eager@eagerm.com) by homiemail-a91.g.dreamhost.com (Postfix) with ESMTPSA id 65C41AE005; Tue, 17 Jun 2014 15:22:07 -0700 (PDT) Message-ID: <53A0BF8F.2040104@eagerm.com> Date: Tue, 17 Jun 2014 22:22:00 -0000 From: Michael Eager User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" CC: David Holsgrove , Nagaraju Mekala , Vidhumouli Hunsigida , Edgar Iglesias , rose.garcia-eggl2fk@yopmail.com Subject: Re: [Patch, microblaze]: Added load and store reverse patterns References: <52F982F9.50407@eagerm.com> In-Reply-To: <52F982F9.50407@eagerm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2014-06/txt/msg01408.txt.bz2 On 02/10/14 17:55, Michael Eager wrote: > On 11/25/13 23:54, David Holsgrove wrote: >> Added the lwr/swr instructions pattern. >> lwr and swr instructions will load/store the data with opposite endianness. >> >> Changelog >> >> 2013-11-26 Nagaraju Mekala >> >> * gcc/config/microblaze/microblaze.md: Add movsi4_rev insn pattern. >> * gcc/config/microblaze/predicates.md: Add reg_or_mem_operand predicate. >> > > GCC-head: Committed revision 207683. > GCC-4.8-branch: Committed revision 207684. Reverted GCC-4.8-branch commit. Committed revision 211750. -- Michael Eager eager@eagercon.com 1960 Park Blvd., Palo Alto, CA 94306 650-325-8077