* [PING][PATCH] Fix for PR 61561
@ 2014-06-30 15:21 Marat Zakirov
2014-07-10 12:57 ` [PING v2][PATCH] " Marat Zakirov
2014-07-10 13:01 ` [PING][PATCH] " Ramana Radhakrishnan
0 siblings, 2 replies; 21+ messages in thread
From: Marat Zakirov @ 2014-06-30 15:21 UTC (permalink / raw)
To: gcc-patches
Cc: Ramana Radhakrishnan, Richard Earnshaw, Kyrill Tkachov,
Slava Garbuzov, Yuri Gribov, marat61
[-- Attachment #1: Type: text/plain, Size: 1500 bytes --]
This is a reminder message on fix for PR 61561 which is ICE while
compiling something which is valid* 'C' code.
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61561).
Ramana, Richard, I am very appreciated for your attention and error
indication, your work made my patch simple and tiny. And I hope that
this patch will save somebody's time.
Additional info about the issue:
By adding constrain 'k' we want to make gcc work properly with stack
register in HI and QI mode. This is need because CSE an RTL phase in
some cases propagates sp register directly to HI/QI memory set. Next
reload an RTL phase trying to build HI/QI move sp into some general
purpose register which is fail due to pattern absence. You may ask who
needs part of sp register? Nevertheless it is legitimate operation and
there is simple example of practical usage. Imagine you put some local
variable 'a' into hash table which has < 256 bunches. In this case
'operator []' of some hash class may take QI from sp register which is
directly pointing on 'a'.
Patch was reg. tested on --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --target=arm-v7a15v5r2-linux-gnueabi for
c,c++,fortran languages w/o bootstrap.
* According to 'C' Standard [ISO/IEC 9899:2011] 6.3.2.3
"Any pointer type may be converted to an integer type. Except as
previously specified, the result is implementation-defined". As we know
'char' and 'short' (also called 'short int') are both integers.
Thank for your attention.
Marat.
[-- Attachment #2: arm.diff --]
[-- Type: text/x-patch, Size: 1916 bytes --]
gcc/ChangeLog:
2014-06-30 Marat Zakirov <m.zakirov@samsung.com>
PR target/61561
* config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer.
(*movhi_bytes): Likewise.
(*arm_movqi_insn): Likewise.
gcc/testsuite/ChangeLog:
2014-06-30 Marat Zakirov <m.zakirov@samsung.com>
PR target/61561
* gcc.dg/pr61561.c: New test.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 42c12c8..99290dc 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -6291,7 +6291,7 @@
;; Pattern to recognize insn generated default case above
(define_insn "*movhi_insn_arch4"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
- (match_operand:HI 1 "general_operand" "rI,K,r,mi"))]
+ (match_operand:HI 1 "general_operand" "rIk,K,r,mi"))]
"TARGET_ARM
&& arm_arch4
&& (register_operand (operands[0], HImode)
@@ -6315,7 +6315,7 @@
(define_insn "*movhi_bytes"
[(set (match_operand:HI 0 "s_register_operand" "=r,r,r")
- (match_operand:HI 1 "arm_rhs_operand" "I,r,K"))]
+ (match_operand:HI 1 "arm_rhs_operand" "I,rk,K"))]
"TARGET_ARM"
"@
mov%?\\t%0, %1\\t%@ movhi
@@ -6430,7 +6430,7 @@
(define_insn "*arm_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,r,l,Uu,r,m")
- (match_operand:QI 1 "general_operand" "r,r,I,Py,K,Uu,l,m,r"))]
+ (match_operand:QI 1 "general_operand" "rk,rk,I,Py,K,Uu,l,m,r"))]
"TARGET_32BIT
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
diff --git a/gcc/testsuite/gcc.dg/pr61561.c b/gcc/testsuite/gcc.dg/pr61561.c
new file mode 100644
index 0000000..0f4b716
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr61561.c
@@ -0,0 +1,15 @@
+/* PR c/61561. */
+/* { dg-do assemble } */
+/* { dg-options " -w -O2" } */
+
+int dummy (int a);
+
+char a;
+short b;
+
+void mmm (void)
+{
+ char dyn[dummy (3)];
+ a = (char)&dyn[0];
+ b = (short)&dyn[0];
+}
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PING v2][PATCH] Fix for PR 61561
2014-06-30 15:21 [PING][PATCH] Fix for PR 61561 Marat Zakirov
@ 2014-07-10 12:57 ` Marat Zakirov
2014-07-10 13:01 ` [PING][PATCH] " Ramana Radhakrishnan
1 sibling, 0 replies; 21+ messages in thread
From: Marat Zakirov @ 2014-07-10 12:57 UTC (permalink / raw)
To: gcc-patches
Cc: Ramana Radhakrishnan, Richard Earnshaw, Kyrill Tkachov,
Slava Garbuzov, Yury Gribov, marat61
[-- Attachment #1: Type: text/plain, Size: 1946 bytes --]
-------- Original Message --------
Subject: [PING][PATCH] Fix for PR 61561
Date: Mon, 30 Jun 2014 19:21:49 +0400
From: Marat Zakirov <m.zakirov@samsung.com>
To: gcc-patches@gcc.gnu.org <gcc-patches@gcc.gnu.org>
CC: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>, Richard
Earnshaw <Richard.Earnshaw@arm.com>, Kyrill Tkachov
<kyrylo.tkachov@arm.com>, Slava Garbuzov <v.garbuzov@samsung.com>, Yuri
Gribov <tetra2005@gmail.com>, marat61@gmail.com
This is a reminder message on fix for PR 61561 which is ICE while
compiling something which is valid* 'C' code.
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61561).
Ramana, Richard, I am very appreciated for your attention and error
indication, your work made my patch simple and tiny. And I hope that
this patch will save somebody's time.
Additional info about the issue:
By adding constrain 'k' we want to make gcc work properly with stack
register in HI and QI mode. This is need because CSE an RTL phase in
some cases propagates sp register directly to HI/QI memory set. Next
reload an RTL phase trying to build HI/QI move sp into some general
purpose register which is fail due to pattern absence. You may ask who
needs part of sp register? Nevertheless it is legitimate operation and
there is simple example of practical usage. Imagine you put some local
variable 'a' into hash table which has < 256 bunches. In this case
'operator []' of some hash class may take QI from sp register which is
directly pointing on 'a'.
Patch was reg. tested on --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --target=arm-v7a15v5r2-linux-gnueabi for
c,c++,fortran languages w/o bootstrap.
* According to 'C' Standard [ISO/IEC 9899:2011] 6.3.2.3
"Any pointer type may be converted to an integer type. Except as
previously specified, the result is implementation-defined". As we know
'char' and 'short' (also called 'short int') are both integers.
Thank for your attention.
Marat.
[-- Attachment #2: arm.diff --]
[-- Type: text/x-patch, Size: 1917 bytes --]
gcc/ChangeLog:
2014-06-30 Marat Zakirov <m.zakirov@samsung.com>
PR target/61561
* config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer.
(*movhi_bytes): Likewise.
(*arm_movqi_insn): Likewise.
gcc/testsuite/ChangeLog:
2014-06-30 Marat Zakirov <m.zakirov@samsung.com>
PR target/61561
* gcc.dg/pr61561.c: New test.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 42c12c8..99290dc 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -6291,7 +6291,7 @@
;; Pattern to recognize insn generated default case above
(define_insn "*movhi_insn_arch4"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
- (match_operand:HI 1 "general_operand" "rI,K,r,mi"))]
+ (match_operand:HI 1 "general_operand" "rIk,K,r,mi"))]
"TARGET_ARM
&& arm_arch4
&& (register_operand (operands[0], HImode)
@@ -6315,7 +6315,7 @@
(define_insn "*movhi_bytes"
[(set (match_operand:HI 0 "s_register_operand" "=r,r,r")
- (match_operand:HI 1 "arm_rhs_operand" "I,r,K"))]
+ (match_operand:HI 1 "arm_rhs_operand" "I,rk,K"))]
"TARGET_ARM"
"@
mov%?\\t%0, %1\\t%@ movhi
@@ -6430,7 +6430,7 @@
(define_insn "*arm_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,r,l,Uu,r,m")
- (match_operand:QI 1 "general_operand" "r,r,I,Py,K,Uu,l,m,r"))]
+ (match_operand:QI 1 "general_operand" "rk,rk,I,Py,K,Uu,l,m,r"))]
"TARGET_32BIT
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
diff --git a/gcc/testsuite/gcc.dg/pr61561.c b/gcc/testsuite/gcc.dg/pr61561.c
new file mode 100644
index 0000000..0f4b716
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr61561.c
@@ -0,0 +1,15 @@
+/* PR c/61561. */
+/* { dg-do assemble } */
+/* { dg-options " -w -O2" } */
+
+int dummy (int a);
+
+char a;
+short b;
+
+void mmm (void)
+{
+ char dyn[dummy (3)];
+ a = (char)&dyn[0];
+ b = (short)&dyn[0];
+}
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PING][PATCH] Fix for PR 61561
2014-06-30 15:21 [PING][PATCH] Fix for PR 61561 Marat Zakirov
2014-07-10 12:57 ` [PING v2][PATCH] " Marat Zakirov
@ 2014-07-10 13:01 ` Ramana Radhakrishnan
2014-07-11 9:09 ` Fwd: " Marat Zakirov
1 sibling, 1 reply; 21+ messages in thread
From: Ramana Radhakrishnan @ 2014-07-10 13:01 UTC (permalink / raw)
To: Marat Zakirov, gcc-patches
Cc: Richard Earnshaw, Kyrylo Tkachov, Slava Garbuzov, Yuri Gribov, marat61
On 30/06/14 16:21, Marat Zakirov wrote:
>
> Thank for your attention.
This is OK for trunk - Sorry about the delayed response.
Ramana
> Marat.
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Fwd: Re: [PING][PATCH] Fix for PR 61561
2014-07-10 13:01 ` [PING][PATCH] " Ramana Radhakrishnan
@ 2014-07-11 9:09 ` Marat Zakirov
2014-07-11 19:19 ` Christophe Lyon
0 siblings, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-07-11 9:09 UTC (permalink / raw)
To: gcc-patches, Ramana Radhakrishnan
Cc: Richard Earnshaw, Kyrylo Tkachov, Slava Garbuzov, Yury Gribov
Thank to you all.
Committed revision 212450.
--Marat
-------- Original Message --------
Subject: Re: [PING][PATCH] Fix for PR 61561
Date: Thu, 10 Jul 2014 14:01:24 +0100
From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
To: Marat Zakirov <m.zakirov@samsung.com>, "gcc-patches@gcc.gnu.org"
<gcc-patches@gcc.gnu.org>
CC: Richard Earnshaw <Richard.Earnshaw@arm.com>, Kyrylo Tkachov
<Kyrylo.Tkachov@arm.com>, Slava Garbuzov <v.garbuzov@samsung.com>, Yuri
Gribov <tetra2005@gmail.com>, "marat61@gmail.com" <marat61@gmail.com>
On 30/06/14 16:21, Marat Zakirov wrote:
>
> Thank for your attention.
This is OK for trunk - Sorry about the delayed response.
Ramana
> Marat.
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: Re: [PING][PATCH] Fix for PR 61561
2014-07-11 9:09 ` Fwd: " Marat Zakirov
@ 2014-07-11 19:19 ` Christophe Lyon
2014-07-14 7:45 ` Marat Zakirov
2014-07-16 9:24 ` Marat Zakirov
0 siblings, 2 replies; 21+ messages in thread
From: Christophe Lyon @ 2014-07-11 19:19 UTC (permalink / raw)
To: Marat Zakirov
Cc: gcc-patches, Ramana Radhakrishnan, Richard Earnshaw,
Kyrylo Tkachov, Slava Garbuzov, Yury Gribov
The new testcase causes an ICE when the compile is configured
--with-thumb or when forcing -mthumb.
Christophe.
On 11 July 2014 11:08, Marat Zakirov <m.zakirov@samsung.com> wrote:
> Thank to you all.
>
> Committed revision 212450.
>
> --Marat
>
>
> -------- Original Message --------
> Subject: Re: [PING][PATCH] Fix for PR 61561
> Date: Thu, 10 Jul 2014 14:01:24 +0100
> From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
> To: Marat Zakirov <m.zakirov@samsung.com>, "gcc-patches@gcc.gnu.org"
> <gcc-patches@gcc.gnu.org>
> CC: Richard Earnshaw <Richard.Earnshaw@arm.com>, Kyrylo Tkachov
> <Kyrylo.Tkachov@arm.com>, Slava Garbuzov <v.garbuzov@samsung.com>, Yuri
> Gribov <tetra2005@gmail.com>, "marat61@gmail.com" <marat61@gmail.com>
>
>
>
>
>
> On 30/06/14 16:21, Marat Zakirov wrote:
>>
>>
>> Thank for your attention.
>
>
> This is OK for trunk - Sorry about the delayed response.
>
> Ramana
>
>> Marat.
>>
>
>
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PING][PATCH] Fix for PR 61561
2014-07-11 19:19 ` Christophe Lyon
@ 2014-07-14 7:45 ` Marat Zakirov
2014-07-14 9:07 ` Christophe Lyon
2014-07-16 9:24 ` Marat Zakirov
1 sibling, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-07-14 7:45 UTC (permalink / raw)
To: Christophe Lyon
Cc: gcc-patches, Ramana Radhakrishnan, Richard Earnshaw,
Kyrylo Tkachov, Slava Garbuzov, Yury Gribov
Unfortunately, I didn't reproduce the issue...
Could you please provide full info? Including gcc trunk version,
configure line, failed test command line.
Thank you.
--Marat
On 07/11/2014 11:19 PM, Christophe Lyon wrote:
> The new testcase causes an ICE when the compile is configured
> --with-thumb or when forcing -mthumb.
>
> Christophe.
>
>
> On 11 July 2014 11:08, Marat Zakirov <m.zakirov@samsung.com> wrote:
>> Thank to you all.
>>
>> Committed revision 212450.
>>
>> --Marat
>>
>>
>> -------- Original Message --------
>> Subject: Re: [PING][PATCH] Fix for PR 61561
>> Date: Thu, 10 Jul 2014 14:01:24 +0100
>> From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
>> To: Marat Zakirov <m.zakirov@samsung.com>, "gcc-patches@gcc.gnu.org"
>> <gcc-patches@gcc.gnu.org>
>> CC: Richard Earnshaw <Richard.Earnshaw@arm.com>, Kyrylo Tkachov
>> <Kyrylo.Tkachov@arm.com>, Slava Garbuzov <v.garbuzov@samsung.com>, Yuri
>> Gribov <tetra2005@gmail.com>, "marat61@gmail.com" <marat61@gmail.com>
>>
>>
>>
>>
>>
>> On 30/06/14 16:21, Marat Zakirov wrote:
>>>
>>> Thank for your attention.
>>
>> This is OK for trunk - Sorry about the delayed response.
>>
>> Ramana
>>
>>> Marat.
>>>
>>
>>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PING][PATCH] Fix for PR 61561
2014-07-14 7:45 ` Marat Zakirov
@ 2014-07-14 9:07 ` Christophe Lyon
0 siblings, 0 replies; 21+ messages in thread
From: Christophe Lyon @ 2014-07-14 9:07 UTC (permalink / raw)
To: Marat Zakirov
Cc: gcc-patches, Ramana Radhakrishnan, Richard Earnshaw,
Kyrylo Tkachov, Slava Garbuzov, Yury Gribov
On 14 July 2014 09:45, Marat Zakirov <m.zakirov@samsung.com> wrote:
> Unfortunately, I didn't reproduce the issue...
>
> Could you please provide full info? Including gcc trunk version, configure
> line, failed test command line.
>
> Thank you.
>
I'm not at office, so I am not going to be able to provide full details.
However, the trunk version is the one where you committed your patch.
configure: --target arm-none-linux-gnueabihf --with-thumb
should be sufficient, then just make check and look at the results of
the test you introduced.
Christophe.
> --Marat
>
>
> On 07/11/2014 11:19 PM, Christophe Lyon wrote:
>>
>> The new testcase causes an ICE when the compile is configured
>> --with-thumb or when forcing -mthumb.
>>
>> Christophe.
>>
>>
>> On 11 July 2014 11:08, Marat Zakirov <m.zakirov@samsung.com> wrote:
>>>
>>> Thank to you all.
>>>
>>> Committed revision 212450.
>>>
>>> --Marat
>>>
>>>
>>> -------- Original Message --------
>>> Subject: Re: [PING][PATCH] Fix for PR 61561
>>> Date: Thu, 10 Jul 2014 14:01:24 +0100
>>> From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
>>> To: Marat Zakirov <m.zakirov@samsung.com>, "gcc-patches@gcc.gnu.org"
>>> <gcc-patches@gcc.gnu.org>
>>> CC: Richard Earnshaw <Richard.Earnshaw@arm.com>, Kyrylo Tkachov
>>> <Kyrylo.Tkachov@arm.com>, Slava Garbuzov <v.garbuzov@samsung.com>, Yuri
>>> Gribov <tetra2005@gmail.com>, "marat61@gmail.com" <marat61@gmail.com>
>>>
>>>
>>>
>>>
>>>
>>> On 30/06/14 16:21, Marat Zakirov wrote:
>>>>
>>>>
>>>> Thank for your attention.
>>>
>>>
>>> This is OK for trunk - Sorry about the delayed response.
>>>
>>> Ramana
>>>
>>>> Marat.
>>>>
>>>
>>>
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PING][PATCH] Fix for PR 61561
2014-07-11 19:19 ` Christophe Lyon
2014-07-14 7:45 ` Marat Zakirov
@ 2014-07-16 9:24 ` Marat Zakirov
2014-07-16 9:36 ` Kyrill Tkachov
1 sibling, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-07-16 9:24 UTC (permalink / raw)
To: Christophe Lyon
Cc: gcc-patches, Ramana Radhakrishnan, Richard Earnshaw,
Kyrylo Tkachov, Slava Garbuzov, Yury Gribov
[-- Attachment #1: Type: text/plain, Size: 1216 bytes --]
Christophe,
Please look at a new patch. Draft tests are OK.
I'll ask your commit approval when full regression (ARM/thumb1/thumb2)
tests are done.
Thank for your attention.
--Marat
On 07/11/2014 11:19 PM, Christophe Lyon wrote:
> The new testcase causes an ICE when the compile is configured
> --with-thumb or when forcing -mthumb.
>
> Christophe.
>
>
> On 11 July 2014 11:08, Marat Zakirov <m.zakirov@samsung.com> wrote:
>> Thank to you all.
>>
>> Committed revision 212450.
>>
>> --Marat
>>
>>
>> -------- Original Message --------
>> Subject: Re: [PING][PATCH] Fix for PR 61561
>> Date: Thu, 10 Jul 2014 14:01:24 +0100
>> From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
>> To: Marat Zakirov <m.zakirov@samsung.com>, "gcc-patches@gcc.gnu.org"
>> <gcc-patches@gcc.gnu.org>
>> CC: Richard Earnshaw <Richard.Earnshaw@arm.com>, Kyrylo Tkachov
>> <Kyrylo.Tkachov@arm.com>, Slava Garbuzov <v.garbuzov@samsung.com>, Yuri
>> Gribov <tetra2005@gmail.com>, "marat61@gmail.com" <marat61@gmail.com>
>>
>>
>>
>>
>>
>> On 30/06/14 16:21, Marat Zakirov wrote:
>>>
>>> Thank for your attention.
>>
>> This is OK for trunk - Sorry about the delayed response.
>>
>> Ramana
>>
>>> Marat.
>>>
>>
>>
[-- Attachment #2: thumb.diff --]
[-- Type: text/x-patch, Size: 1637 bytes --]
gcc/ChangeLog:
2014-07-16 Marat Zakirov <m.zakirov@samsung.com>
* config/arm/thumb1.md: Handle stack pointer.
* config/arm/thumb2.md: Ditto.
diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index c044fd5..47b5cbd 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -708,7 +708,7 @@
(define_insn "*thumb1_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
+ (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
@@ -762,7 +762,7 @@
(define_insn "*thumb1_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
+ (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 6ea0810..7228069 100644
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -318,7 +318,7 @@
;; of the messiness associated with the ARM patterns.
(define_insn "*thumb2_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
- (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
+ (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
"TARGET_THUMB2
&& (register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PING][PATCH] Fix for PR 61561
2014-07-16 9:24 ` Marat Zakirov
@ 2014-07-16 9:36 ` Kyrill Tkachov
2014-07-17 12:18 ` Marat Zakirov
0 siblings, 1 reply; 21+ messages in thread
From: Kyrill Tkachov @ 2014-07-16 9:36 UTC (permalink / raw)
To: Marat Zakirov, Christophe Lyon
Cc: gcc-patches, Ramana Radhakrishnan, Richard Earnshaw,
Slava Garbuzov, Yury Gribov
On 16/07/14 10:22, Marat Zakirov wrote:
> Christophe,
>
> Please look at a new patch. Draft tests are OK.
> I'll ask your commit approval when full regression (ARM/thumb1/thumb2)
> tests are done.
Hi Marat,
I was about to propose the thumb2.md hunk myself, but I'll defer to the
arm maintainers to comment on the other parts.
Also, in the ChangeLog it is helpful to specify which patterns are being
affected, so in your case it would be something like:
* config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
(*thumb1_movqi_insn): Likewise.
* config/arm/thumb2.md (*thumb2_movhi_insn): Ditto.
Kyrill
>
> Thank for your attention.
>
> --Marat
>
> On 07/11/2014 11:19 PM, Christophe Lyon wrote:
>> The new testcase causes an ICE when the compile is configured
>> --with-thumb or when forcing -mthumb.
>>
>> Christophe.
>>
>>
>> On 11 July 2014 11:08, Marat Zakirov <m.zakirov@samsung.com> wrote:
>>> Thank to you all.
>>>
>>> Committed revision 212450.
>>>
>>> --Marat
>>>
>>>
>>> -------- Original Message --------
>>> Subject: Re: [PING][PATCH] Fix for PR 61561
>>> Date: Thu, 10 Jul 2014 14:01:24 +0100
>>> From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
>>> To: Marat Zakirov <m.zakirov@samsung.com>, "gcc-patches@gcc.gnu.org"
>>> <gcc-patches@gcc.gnu.org>
>>> CC: Richard Earnshaw <Richard.Earnshaw@arm.com>, Kyrylo Tkachov
>>> <Kyrylo.Tkachov@arm.com>, Slava Garbuzov <v.garbuzov@samsung.com>, Yuri
>>> Gribov <tetra2005@gmail.com>, "marat61@gmail.com" <marat61@gmail.com>
>>>
>>>
>>>
>>>
>>>
>>> On 30/06/14 16:21, Marat Zakirov wrote:
>>>> Thank for your attention.
>>> This is OK for trunk - Sorry about the delayed response.
>>>
>>> Ramana
>>>
>>>> Marat.
>>>>
>>>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PING][PATCH] Fix for PR 61561
2014-07-16 9:36 ` Kyrill Tkachov
@ 2014-07-17 12:18 ` Marat Zakirov
2014-07-23 13:47 ` Marat Zakirov
0 siblings, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-07-17 12:18 UTC (permalink / raw)
To: Kyrill Tkachov, Christophe Lyon
Cc: gcc-patches, Ramana Radhakrishnan, Richard Earnshaw,
Slava Garbuzov, Yury Gribov
[-- Attachment #1: Type: text/plain, Size: 1287 bytes --]
On 07/16/2014 01:32 PM, Kyrill Tkachov wrote:
>
> On 16/07/14 10:22, Marat Zakirov wrote:
>> Christophe,
>>
>> Please look at a new patch. Draft tests are OK.
>> I'll ask your commit approval when full regression (ARM/thumb1/thumb2)
>> tests are done.
> Hi Marat,
>
> I was about to propose the thumb2.md hunk myself, but I'll defer to
> the arm maintainers to comment on the other parts.
>
> Also, in the ChangeLog it is helpful to specify which patterns are
> being affected, so in your case it would be something like:
>
> * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
> (*thumb1_movqi_insn): Likewise.
> * config/arm/thumb2.md (*thumb2_movhi_insn): Ditto.
>
>
> Kyrill
>
>
Christophe, Kirill,
finally I've finished regression testing.
Please check if my patch is OK for trunk.
The following configures were used:
configure --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu
--target=arm-linux-gnueabi --with-interwork --enable-long-long
--enable-languages=c,c++,fortran --enable-shared --with-gnu-as
--with-gnu-ld --with-arch=$ARCH --with-mode=$MODE
Thumb-1
$ARCH=armv4t
$MODE=thumb
Thumb-2
$ARCH=armv7
$MODE=thumb
ARM
$ARCH=armv7-a
$MODE=arm
No regressions detected, test pr61561.c passed in all cases.
Thank you all.
--Marat
[-- Attachment #2: thumb.diff --]
[-- Type: text/x-patch, Size: 1715 bytes --]
gcc/ChangeLog:
2014-07-16 Marat Zakirov <m.zakirov@samsung.com>
* config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
(*thumb1_movqi_insn): Likewise.
* config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.
diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index c044fd5..47b5cbd 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -708,7 +708,7 @@
(define_insn "*thumb1_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
+ (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
@@ -762,7 +762,7 @@
(define_insn "*thumb1_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
+ (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 6ea0810..7228069 100644
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -318,7 +318,7 @@
;; of the messiness associated with the ARM patterns.
(define_insn "*thumb2_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
- (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
+ (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
"TARGET_THUMB2
&& (register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PING][PATCH] Fix for PR 61561
2014-07-17 12:18 ` Marat Zakirov
@ 2014-07-23 13:47 ` Marat Zakirov
2014-07-30 13:07 ` [PINGv2][PATCH] " Marat Zakirov
0 siblings, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-07-23 13:47 UTC (permalink / raw)
To: Kyrill Tkachov, Christophe Lyon
Cc: gcc-patches, Ramana Radhakrishnan, Richard Earnshaw,
Slava Garbuzov, Yury Gribov
[-- Attachment #1: Type: text/plain, Size: 1458 bytes --]
Hi all!
This is a friendly reminder message.
On 07/17/2014 03:22 PM, Marat Zakirov wrote:
>
> On 07/16/2014 01:32 PM, Kyrill Tkachov wrote:
>>
>> On 16/07/14 10:22, Marat Zakirov wrote:
>>> Christophe,
>>>
>>> Please look at a new patch. Draft tests are OK.
>>> I'll ask your commit approval when full regression (ARM/thumb1/thumb2)
>>> tests are done.
>> Hi Marat,
>>
>> I was about to propose the thumb2.md hunk myself, but I'll defer to
>> the arm maintainers to comment on the other parts.
>>
>> Also, in the ChangeLog it is helpful to specify which patterns are
>> being affected, so in your case it would be something like:
>>
>> * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
>> (*thumb1_movqi_insn): Likewise.
>> * config/arm/thumb2.md (*thumb2_movhi_insn): Ditto.
>>
>>
>> Kyrill
>>
>>
> Christophe, Kirill,
>
> finally I've finished regression testing.
> Please check if my patch is OK for trunk.
>
> The following configures were used:
>
> configure --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu
> --target=arm-linux-gnueabi --with-interwork --enable-long-long
> --enable-languages=c,c++,fortran --enable-shared --with-gnu-as
> --with-gnu-ld --with-arch=$ARCH --with-mode=$MODE
>
> Thumb-1
>
> $ARCH=armv4t
> $MODE=thumb
>
> Thumb-2
>
> $ARCH=armv7
> $MODE=thumb
>
> ARM
>
> $ARCH=armv7-a
> $MODE=arm
>
> No regressions detected, test pr61561.c passed in all cases.
>
> Thank you all.
> --Marat
[-- Attachment #2: thumb.diff --]
[-- Type: text/x-patch, Size: 1715 bytes --]
gcc/ChangeLog:
2014-07-16 Marat Zakirov <m.zakirov@samsung.com>
* config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
(*thumb1_movqi_insn): Likewise.
* config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.
diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index c044fd5..47b5cbd 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -708,7 +708,7 @@
(define_insn "*thumb1_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
+ (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
@@ -762,7 +762,7 @@
(define_insn "*thumb1_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
+ (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 6ea0810..7228069 100644
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -318,7 +318,7 @@
;; of the messiness associated with the ARM patterns.
(define_insn "*thumb2_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
- (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
+ (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
"TARGET_THUMB2
&& (register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PINGv2][PATCH] Fix for PR 61561
2014-07-23 13:47 ` Marat Zakirov
@ 2014-07-30 13:07 ` Marat Zakirov
2014-08-06 14:12 ` [PINGv3][PATCH] " Marat Zakirov
0 siblings, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-07-30 13:07 UTC (permalink / raw)
To: Kyrill Tkachov, Christophe Lyon
Cc: gcc-patches, Ramana Radhakrishnan, Richard Earnshaw,
Slava Garbuzov, Yury Gribov
[-- Attachment #1: Type: text/plain, Size: 1570 bytes --]
On 07/23/2014 05:33 PM, Marat Zakirov wrote:
> Hi all!
>
> This is a friendly reminder message.
>
> On 07/17/2014 03:22 PM, Marat Zakirov wrote:
>>
>> On 07/16/2014 01:32 PM, Kyrill Tkachov wrote:
>>>
>>> On 16/07/14 10:22, Marat Zakirov wrote:
>>>> Christophe,
>>>>
>>>> Please look at a new patch. Draft tests are OK.
>>>> I'll ask your commit approval when full regression (ARM/thumb1/thumb2)
>>>> tests are done.
>>> Hi Marat,
>>>
>>> I was about to propose the thumb2.md hunk myself, but I'll defer to
>>> the arm maintainers to comment on the other parts.
>>>
>>> Also, in the ChangeLog it is helpful to specify which patterns are
>>> being affected, so in your case it would be something like:
>>>
>>> * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
>>> (*thumb1_movqi_insn): Likewise.
>>> * config/arm/thumb2.md (*thumb2_movhi_insn): Ditto.
>>>
>>>
>>> Kyrill
>>>
>>>
>> Christophe, Kirill,
>>
>> finally I've finished regression testing.
>> Please check if my patch is OK for trunk.
>>
>> The following configures were used:
>>
>> configure --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu
>> --target=arm-linux-gnueabi --with-interwork --enable-long-long
>> --enable-languages=c,c++,fortran --enable-shared --with-gnu-as
>> --with-gnu-ld --with-arch=$ARCH --with-mode=$MODE
>>
>> Thumb-1
>>
>> $ARCH=armv4t
>> $MODE=thumb
>>
>> Thumb-2
>>
>> $ARCH=armv7
>> $MODE=thumb
>>
>> ARM
>>
>> $ARCH=armv7-a
>> $MODE=arm
>>
>> No regressions detected, test pr61561.c passed in all cases.
>>
>> Thank you all.
>> --Marat
>
>
[-- Attachment #2: thumb.diff --]
[-- Type: text/x-patch, Size: 1715 bytes --]
gcc/ChangeLog:
2014-07-16 Marat Zakirov <m.zakirov@samsung.com>
* config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
(*thumb1_movqi_insn): Likewise.
* config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.
diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index c044fd5..47b5cbd 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -708,7 +708,7 @@
(define_insn "*thumb1_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
+ (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
@@ -762,7 +762,7 @@
(define_insn "*thumb1_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
+ (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 6ea0810..7228069 100644
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -318,7 +318,7 @@
;; of the messiness associated with the ARM patterns.
(define_insn "*thumb2_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
- (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
+ (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
"TARGET_THUMB2
&& (register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PINGv3][PATCH] Fix for PR 61561
2014-07-30 13:07 ` [PINGv2][PATCH] " Marat Zakirov
@ 2014-08-06 14:12 ` Marat Zakirov
2014-08-06 14:14 ` Ramana Radhakrishnan
0 siblings, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-08-06 14:12 UTC (permalink / raw)
To: gcc-patches
Cc: Kyrill Tkachov, Christophe Lyon, Ramana Radhakrishnan,
Richard Earnshaw, Slava Garbuzov, Yury Gribov
[-- Attachment #1: Type: text/plain, Size: 1688 bytes --]
On 07/30/2014 04:56 PM, Marat Zakirov wrote:
> On 07/23/2014 05:33 PM, Marat Zakirov wrote:
>> Hi all!
>>
>> This is a friendly reminder message.
>>
>> On 07/17/2014 03:22 PM, Marat Zakirov wrote:
>>>
>>> On 07/16/2014 01:32 PM, Kyrill Tkachov wrote:
>>>>
>>>> On 16/07/14 10:22, Marat Zakirov wrote:
>>>>> Christophe,
>>>>>
>>>>> Please look at a new patch. Draft tests are OK.
>>>>> I'll ask your commit approval when full regression
>>>>> (ARM/thumb1/thumb2)
>>>>> tests are done.
>>>> Hi Marat,
>>>>
>>>> I was about to propose the thumb2.md hunk myself, but I'll defer to
>>>> the arm maintainers to comment on the other parts.
>>>>
>>>> Also, in the ChangeLog it is helpful to specify which patterns are
>>>> being affected, so in your case it would be something like:
>>>>
>>>> * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
>>>> (*thumb1_movqi_insn): Likewise.
>>>> * config/arm/thumb2.md (*thumb2_movhi_insn): Ditto.
>>>>
>>>>
>>>> Kyrill
>>>>
>>>>
>>> Christophe, Kirill,
>>>
>>> finally I've finished regression testing.
>>> Please check if my patch is OK for trunk.
>>>
>>> The following configures were used:
>>>
>>> configure --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu
>>> --target=arm-linux-gnueabi --with-interwork --enable-long-long
>>> --enable-languages=c,c++,fortran --enable-shared --with-gnu-as
>>> --with-gnu-ld --with-arch=$ARCH --with-mode=$MODE
>>>
>>> Thumb-1
>>>
>>> $ARCH=armv4t
>>> $MODE=thumb
>>>
>>> Thumb-2
>>>
>>> $ARCH=armv7
>>> $MODE=thumb
>>>
>>> ARM
>>>
>>> $ARCH=armv7-a
>>> $MODE=arm
>>>
>>> No regressions detected, test pr61561.c passed in all cases.
>>>
>>> Thank you all.
>>> --Marat
>>
>>
>
[-- Attachment #2: thumb.diff --]
[-- Type: text/x-patch, Size: 1715 bytes --]
gcc/ChangeLog:
2014-07-16 Marat Zakirov <m.zakirov@samsung.com>
* config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
(*thumb1_movqi_insn): Likewise.
* config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.
diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index c044fd5..47b5cbd 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -708,7 +708,7 @@
(define_insn "*thumb1_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
+ (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
@@ -762,7 +762,7 @@
(define_insn "*thumb1_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
+ (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 6ea0810..7228069 100644
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -318,7 +318,7 @@
;; of the messiness associated with the ARM patterns.
(define_insn "*thumb2_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
- (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
+ (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
"TARGET_THUMB2
&& (register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PINGv3][PATCH] Fix for PR 61561
2014-08-06 14:12 ` [PINGv3][PATCH] " Marat Zakirov
@ 2014-08-06 14:14 ` Ramana Radhakrishnan
2014-08-06 14:44 ` Richard Earnshaw
0 siblings, 1 reply; 21+ messages in thread
From: Ramana Radhakrishnan @ 2014-08-06 14:14 UTC (permalink / raw)
To: Marat Zakirov, gcc-patches
Cc: Kyrylo Tkachov, Christophe Lyon, Richard Earnshaw,
Slava Garbuzov, Yury Gribov
This is OK thanks.
Ramana
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PINGv3][PATCH] Fix for PR 61561
2014-08-06 14:14 ` Ramana Radhakrishnan
@ 2014-08-06 14:44 ` Richard Earnshaw
2014-08-07 7:37 ` Marat Zakirov
0 siblings, 1 reply; 21+ messages in thread
From: Richard Earnshaw @ 2014-08-06 14:44 UTC (permalink / raw)
To: Ramana Radhakrishnan
Cc: Marat Zakirov, gcc-patches, Kyrylo Tkachov, Christophe Lyon,
Slava Garbuzov, Yury Gribov
On 06/08/14 15:14, Ramana Radhakrishnan wrote:
>
>
> This is OK thanks.
>
>
> Ramana
>
Hmm, minor nit.
(define_insn "*thumb1_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
+ (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
This would be better expressed as:
[(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
(match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
that is, to use the 4th alternative. That's because the use of SP in
these operations does not clobber the flags.
Similarly for the movqi pattern.
R.
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PINGv3][PATCH] Fix for PR 61561
2014-08-06 14:44 ` Richard Earnshaw
@ 2014-08-07 7:37 ` Marat Zakirov
2014-08-07 8:01 ` Ramana Radhakrishnan
0 siblings, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-08-07 7:37 UTC (permalink / raw)
To: Richard Earnshaw, Ramana Radhakrishnan
Cc: gcc-patches, Kyrylo Tkachov, Christophe Lyon, Slava Garbuzov,
Yury Gribov
Thank you.
$ svn commit
Sending gcc/ChangeLog
Sending gcc/config/arm/thumb1.md
Sending gcc/config/arm/thumb2.md
Transmitting file data ...
Committed revision 213695.
P.S.
Minor nit was reg. tested.
On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
> On 06/08/14 15:14, Ramana Radhakrishnan wrote:
>>
>> This is OK thanks.
>>
>>
>> Ramana
>>
>
> Hmm, minor nit.
>
> (define_insn "*thumb1_movhi_insn"
> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
> + (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
>
> This would be better expressed as:
>
> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
> (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>
> that is, to use the 4th alternative. That's because the use of SP in
> these operations does not clobber the flags.
>
> Similarly for the movqi pattern.
>
> R.
>
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PINGv3][PATCH] Fix for PR 61561
2014-08-07 7:37 ` Marat Zakirov
@ 2014-08-07 8:01 ` Ramana Radhakrishnan
2014-08-07 8:11 ` Marat Zakirov
0 siblings, 1 reply; 21+ messages in thread
From: Ramana Radhakrishnan @ 2014-08-07 8:01 UTC (permalink / raw)
To: Marat Zakirov
Cc: Richard Earnshaw, Ramana Radhakrishnan, gcc-patches,
Kyrylo Tkachov, Christophe Lyon, Slava Garbuzov, Yury Gribov
On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov <m.zakirov@samsung.com> wrote:
> Thank you.
>
> $ svn commit
> Sending gcc/ChangeLog
> Sending gcc/config/arm/thumb1.md
> Sending gcc/config/arm/thumb2.md
> Transmitting file data ...
> Committed revision 213695.
>
> P.S.
>
> Minor nit was reg. tested.
Another minor nit - please send the patch you committed to be archived
on the mailing list.
regards
Ramana
>
>
> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>
>> On 06/08/14 15:14, Ramana Radhakrishnan wrote:
>>>
>>>
>>> This is OK thanks.
>>>
>>>
>>> Ramana
>>>
>>
>> Hmm, minor nit.
>>
>> (define_insn "*thumb1_movhi_insn"
>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>> + (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
>>
>> This would be better expressed as:
>>
>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
>> (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>
>> that is, to use the 4th alternative. That's because the use of SP in
>> these operations does not clobber the flags.
>>
>> Similarly for the movqi pattern.
>>
>> R.
>>
>>
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PINGv3][PATCH] Fix for PR 61561
2014-08-07 8:01 ` Ramana Radhakrishnan
@ 2014-08-07 8:11 ` Marat Zakirov
2014-08-07 8:50 ` Richard Earnshaw
0 siblings, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-08-07 8:11 UTC (permalink / raw)
To: ramrad01
Cc: Richard Earnshaw, Ramana Radhakrishnan, gcc-patches,
Kyrylo Tkachov, Christophe Lyon, Slava Garbuzov, Yury Gribov
[-- Attachment #1: Type: text/plain, Size: 1355 bytes --]
--Marat
On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote:
> On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov <m.zakirov@samsung.com> wrote:
>> Thank you.
>>
>> $ svn commit
>> Sending gcc/ChangeLog
>> Sending gcc/config/arm/thumb1.md
>> Sending gcc/config/arm/thumb2.md
>> Transmitting file data ...
>> Committed revision 213695.
>>
>> P.S.
>>
>> Minor nit was reg. tested.
> Another minor nit - please send the patch you committed to be archived
> on the mailing list.
>
> regards
> Ramana
>
>>
>> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>> On 06/08/14 15:14, Ramana Radhakrishnan wrote:
>>>>
>>>> This is OK thanks.
>>>>
>>>>
>>>> Ramana
>>>>
>>> Hmm, minor nit.
>>>
>>> (define_insn "*thumb1_movhi_insn"
>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>>> + (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
>>>
>>> This would be better expressed as:
>>>
>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
>>> (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>>
>>> that is, to use the 4th alternative. That's because the use of SP in
>>> these operations does not clobber the flags.
>>>
>>> Similarly for the movqi pattern.
>>>
>>> R.
>>>
>>>
[-- Attachment #2: thumb2.diff --]
[-- Type: text/x-patch, Size: 1789 bytes --]
gcc/ChangeLog:
2014-08-07 Marat Zakirov <m.zakirov@samsung.com>
* config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
(*thumb1_movqi_insn): Likewise.
* config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.
diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index cd1adf4..fed741e 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -707,8 +707,8 @@
)
(define_insn "*thumb1_movhi_insn"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
+ (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
@@ -762,7 +762,7 @@
(define_insn "*thumb1_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
+ (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 029a679..983b59d 100644
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -318,7 +318,7 @@
;; of the messiness associated with the ARM patterns.
(define_insn "*thumb2_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
- (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
+ (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
"TARGET_THUMB2
&& (register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PINGv3][PATCH] Fix for PR 61561
2014-08-07 8:11 ` Marat Zakirov
@ 2014-08-07 8:50 ` Richard Earnshaw
2014-08-07 9:02 ` Marat Zakirov
0 siblings, 1 reply; 21+ messages in thread
From: Richard Earnshaw @ 2014-08-07 8:50 UTC (permalink / raw)
To: Marat Zakirov
Cc: Ramana Radhakrishnan, gcc-patches, Kyrylo Tkachov,
Christophe Lyon, Slava Garbuzov, Yury Gribov
>>> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>>> Similarly for the movqi pattern.
You haven't updated the thumb1 QImode pattern in the same way.
R.
On 07/08/14 09:10, Marat Zakirov wrote:
> --Marat
> On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote:
>> On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov <m.zakirov@samsung.com> wrote:
>>> Thank you.
>>>
>>> $ svn commit
>>> Sending gcc/ChangeLog
>>> Sending gcc/config/arm/thumb1.md
>>> Sending gcc/config/arm/thumb2.md
>>> Transmitting file data ...
>>> Committed revision 213695.
>>>
>>> P.S.
>>>
>>> Minor nit was reg. tested.
>> Another minor nit - please send the patch you committed to be archived
>> on the mailing list.
>>
>> regards
>> Ramana
>>
>>>
>>> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>>> On 06/08/14 15:14, Ramana Radhakrishnan wrote:
>>>>>
>>>>> This is OK thanks.
>>>>>
>>>>>
>>>>> Ramana
>>>>>
>>>> Hmm, minor nit.
>>>>
>>>> (define_insn "*thumb1_movhi_insn"
>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>>>> + (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
>>>>
>>>> This would be better expressed as:
>>>>
>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
>>>> (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>>>
>>>> that is, to use the 4th alternative. That's because the use of SP in
>>>> these operations does not clobber the flags.
>>>>
>>>> Similarly for the movqi pattern.
>>>>
>>>> R.
>>>>
>>>>
>>>>
>>>> thumb2.diff
>>>>
>>>>
>>>> gcc/ChangeLog:
>>>>
>>>> 2014-08-07 Marat Zakirov <m.zakirov@samsung.com>
>>>>
>>>> * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
>>>> (*thumb1_movqi_insn): Likewise.
>>>> * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.
>>>>
>>>> diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
>>>> index cd1adf4..fed741e 100644
>>>> --- a/gcc/config/arm/thumb1.md
>>>> +++ b/gcc/config/arm/thumb1.md
>>>> @@ -707,8 +707,8 @@
>>>> )
>>>>
>>>> (define_insn "*thumb1_movhi_insn"
>>>> - [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>>>> + [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
>>>> + (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>>> "TARGET_THUMB1
>>>> && ( register_operand (operands[0], HImode)
>>>> || register_operand (operands[1], HImode))"
>>>> @@ -762,7 +762,7 @@
>>>>
>>>> (define_insn "*thumb1_movqi_insn"
>>>> [(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>>> - (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
>>>> + (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
>>>> "TARGET_THUMB1
>>>> && ( register_operand (operands[0], QImode)
>>>> || register_operand (operands[1], QImode))"
>>>> diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
>>>> index 029a679..983b59d 100644
>>>> --- a/gcc/config/arm/thumb2.md
>>>> +++ b/gcc/config/arm/thumb2.md
>>>> @@ -318,7 +318,7 @@
>>>> ;; of the messiness associated with the ARM patterns.
>>>> (define_insn "*thumb2_movhi_insn"
>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
>>>> - (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
>>>> + (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
>>>> "TARGET_THUMB2
>>>> && (register_operand (operands[0], HImode)
>>>> || register_operand (operands[1], HImode))"
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PINGv3][PATCH] Fix for PR 61561
2014-08-07 8:50 ` Richard Earnshaw
@ 2014-08-07 9:02 ` Marat Zakirov
2014-08-07 13:52 ` Marat Zakirov
0 siblings, 1 reply; 21+ messages in thread
From: Marat Zakirov @ 2014-08-07 9:02 UTC (permalink / raw)
To: Richard Earnshaw
Cc: Ramana Radhakrishnan, gcc-patches, Kyrylo Tkachov,
Christophe Lyon, Slava Garbuzov, Yury Gribov
Sorry ;( Will test&fix it.
On 08/07/2014 12:50 PM, Richard Earnshaw wrote:
>>>> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>>>> Similarly for the movqi pattern.
>
> You haven't updated the thumb1 QImode pattern in the same way.
>
> R.
>
> On 07/08/14 09:10, Marat Zakirov wrote:
>> --Marat
>> On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote:
>>> On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov <m.zakirov@samsung.com> wrote:
>>>> Thank you.
>>>>
>>>> $ svn commit
>>>> Sending gcc/ChangeLog
>>>> Sending gcc/config/arm/thumb1.md
>>>> Sending gcc/config/arm/thumb2.md./gcc/config/arm/thumb1.md
>>>> Transmitting file data ...
>>>> Committed revision 213695.
>>>>
>>>> P.S.
>>>>
>>>> Minor nit was reg. tested.
>>> Another minor nit - please send the patch you committed to be archived
>>> on the mailing list.
>>>
>>> regards
>>> Ramana
>>>
>>>> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>>>> On 06/08/14 15:14, Ramana Radhakrishnan wrote:
>>>>>> This is OK thanks.
>>>>>>
>>>>>>
>>>>>> Ramana
>>>>>>
>>>>> Hmm, minor nit.
>>>>>
>>>>> (define_insn "*thumb1_movhi_insn"
>>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>>>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>>>>> + (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
>>>>>
>>>>> This would be better expressed as:
>>>>>
>>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
>>>>> (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>>>>
>>>>> that is, to use the 4th alternative. That's because the use of SP in
>>>>> these operations does not clobber the flags.
>>>>>
>>>>> Similarly for the movqi pattern.
>>>>>
>>>>> R.
>>>>>
>>>>>
>>>>>
>>>>> thumb2.diff
>>>>>
>>>>>
>>>>> gcc/ChangeLog:
>>>>>
>>>>> 2014-08-07 Marat Zakirov <m.zakirov@samsung.com>
>>>>>
>>>>> * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
>>>>> (*thumb1_movqi_insn): Likewise.
>>>>> * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.
>>>>>
>>>>> diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
>>>>> index cd1adf4..fed741e 100644
>>>>> --- a/gcc/config/arm/thumb1.md
>>>>> +++ b/gcc/config/arm/thumb1.md
>>>>> @@ -707,8 +707,8 @@
>>>>> )
>>>>>
>>>>> (define_insn "*thumb1_movhi_insn"
>>>>> - [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>>>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>>>>> + [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
>>>>> + (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>>>> "TARGET_THUMB1
>>>>> && ( register_operand (operands[0], HImode)
>>>>> || register_operand (operands[1], HImode))"
>>>>> @@ -762,7 +762,7 @@
>>>>>
>>>>> (define_insn "*thumb1_movqi_insn"
>>>>> [(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>>>> - (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
>>>>> + (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
>>>>> "TARGET_THUMB1
>>>>> && ( register_operand (operands[0], QImode)
>>>>> || register_operand (operands[1], QImode))"
>>>>> diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
>>>>> index 029a679..983b59d 100644
>>>>> --- a/gcc/config/arm/thumb2.md
>>>>> +++ b/gcc/config/arm/thumb2.md
>>>>> @@ -318,7 +318,7 @@
>>>>> ;; of the messiness associated with the ARM patterns.
>>>>> (define_insn "*thumb2_movhi_insn"
>>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
>>>>> - (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
>>>>> + (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
>>>>> "TARGET_THUMB2
>>>>> && (register_operand (operands[0], HImode)
>>>>> || register_operand (operands[1], HImode))"
>
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PINGv3][PATCH] Fix for PR 61561
2014-08-07 9:02 ` Marat Zakirov
@ 2014-08-07 13:52 ` Marat Zakirov
0 siblings, 0 replies; 21+ messages in thread
From: Marat Zakirov @ 2014-08-07 13:52 UTC (permalink / raw)
To: Richard Earnshaw
Cc: Ramana Radhakrishnan, gcc-patches, Kyrylo Tkachov,
Christophe Lyon, Slava Garbuzov, Yury Gribov
[-- Attachment #1: Type: text/plain, Size: 4215 bytes --]
Sending gcc/ChangeLog
Sending gcc/config/arm/thumb1.md
Transmitting file data ..
Committed revision 213710.
P.S. Sorry for inconvenience.
On 08/07/2014 01:02 PM, Marat Zakirov wrote:
> Sorry ;( Will test&fix it.
>
> On 08/07/2014 12:50 PM, Richard Earnshaw wrote:
>>>>> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>>>>> Similarly for the movqi pattern.
>>
>> You haven't updated the thumb1 QImode pattern in the same way.
>>
>> R.
>>
>> On 07/08/14 09:10, Marat Zakirov wrote:
>>> --Marat
>>> On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote:
>>>> On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov
>>>> <m.zakirov@samsung.com> wrote:
>>>>> Thank you.
>>>>>
>>>>> $ svn commit
>>>>> Sending gcc/ChangeLog
>>>>> Sending gcc/config/arm/thumb1.md
>>>>> Sending gcc/config/arm/thumb2.md./gcc/config/arm/thumb1.md
>>>>> Transmitting file data ...
>>>>> Committed revision 213695.
>>>>>
>>>>> P.S.
>>>>>
>>>>> Minor nit was reg. tested.
>>>> Another minor nit - please send the patch you committed to be archived
>>>> on the mailing list.
>>>>
>>>> regards
>>>> Ramana
>>>>
>>>>> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>>>>> On 06/08/14 15:14, Ramana Radhakrishnan wrote:
>>>>>>> This is OK thanks.
>>>>>>>
>>>>>>>
>>>>>>> Ramana
>>>>>>>
>>>>>> Hmm, minor nit.
>>>>>>
>>>>>> (define_insn "*thumb1_movhi_insn"
>>>>>> [(set (match_operand:HI 0 "nonimmediate_operand"
>>>>>> "=l,l,m,*r,*h,l")
>>>>>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>>>>>> + (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
>>>>>>
>>>>>> This would be better expressed as:
>>>>>>
>>>>>> [(set (match_operand:HI 0 "nonimmediate_operand"
>>>>>> "=l,l,m,l*r,*h,l")
>>>>>> (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>>>>>
>>>>>> that is, to use the 4th alternative. That's because the use of
>>>>>> SP in
>>>>>> these operations does not clobber the flags.
>>>>>>
>>>>>> Similarly for the movqi pattern.
>>>>>>
>>>>>> R.
>>>>>>
>>>>>>
>>>>>>
>>>>>> thumb2.diff
>>>>>>
>>>>>>
>>>>>> gcc/ChangeLog:
>>>>>>
>>>>>> 2014-08-07 Marat Zakirov <m.zakirov@samsung.com>
>>>>>>
>>>>>> * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack
>>>>>> pointer.
>>>>>> (*thumb1_movqi_insn): Likewise.
>>>>>> * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.
>>>>>>
>>>>>> diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
>>>>>> index cd1adf4..fed741e 100644
>>>>>> --- a/gcc/config/arm/thumb1.md
>>>>>> +++ b/gcc/config/arm/thumb1.md
>>>>>> @@ -707,8 +707,8 @@
>>>>>> )
>>>>>> (define_insn "*thumb1_movhi_insn"
>>>>>> - [(set (match_operand:HI 0 "nonimmediate_operand"
>>>>>> "=l,l,m,*r,*h,l")
>>>>>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>>>>>> + [(set (match_operand:HI 0 "nonimmediate_operand"
>>>>>> "=l,l,m,l*r,*h,l")
>>>>>> + (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>>>>> "TARGET_THUMB1
>>>>>> && ( register_operand (operands[0], HImode)
>>>>>> || register_operand (operands[1], HImode))"
>>>>>> @@ -762,7 +762,7 @@
>>>>>> (define_insn "*thumb1_movqi_insn"
>>>>>> [(set (match_operand:QI 0 "nonimmediate_operand"
>>>>>> "=l,l,m,*r,*h,l")
>>>>>> - (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
>>>>>> + (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
>>>>>> "TARGET_THUMB1
>>>>>> && ( register_operand (operands[0], QImode)
>>>>>> || register_operand (operands[1], QImode))"
>>>>>> diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
>>>>>> index 029a679..983b59d 100644
>>>>>> --- a/gcc/config/arm/thumb2.md
>>>>>> +++ b/gcc/config/arm/thumb2.md
>>>>>> @@ -318,7 +318,7 @@
>>>>>> ;; of the messiness associated with the ARM patterns.
>>>>>> (define_insn "*thumb2_movhi_insn"
>>>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
>>>>>> - (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
>>>>>> + (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
>>>>>> "TARGET_THUMB2
>>>>>> && (register_operand (operands[0], HImode)
>>>>>> || register_operand (operands[1], HImode))"
>>
>>
>
[-- Attachment #2: thumb3.diff --]
[-- Type: text/x-patch, Size: 686 bytes --]
gcc/ChangeLog:
2014-08-07 Marat Zakirov <m.zakirov@samsung.com>
* config/arm/thumb1.md (*thumb1_movqi_insn): Copy of thumb1_movhi_insn.
--- gcc/config/arm/thumb1.md (revision 213695)
+++ gcc/config/arm/thumb1.md (working copy)
@@ -761,8 +761,8 @@
)
(define_insn "*thumb1_movqi_insn"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
- (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
+ (match_operand:QI 1 "general_operand" "l,m,l,k*h,*r,I"))]
"TARGET_THUMB1
&& ( register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2014-08-07 13:52 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-06-30 15:21 [PING][PATCH] Fix for PR 61561 Marat Zakirov
2014-07-10 12:57 ` [PING v2][PATCH] " Marat Zakirov
2014-07-10 13:01 ` [PING][PATCH] " Ramana Radhakrishnan
2014-07-11 9:09 ` Fwd: " Marat Zakirov
2014-07-11 19:19 ` Christophe Lyon
2014-07-14 7:45 ` Marat Zakirov
2014-07-14 9:07 ` Christophe Lyon
2014-07-16 9:24 ` Marat Zakirov
2014-07-16 9:36 ` Kyrill Tkachov
2014-07-17 12:18 ` Marat Zakirov
2014-07-23 13:47 ` Marat Zakirov
2014-07-30 13:07 ` [PINGv2][PATCH] " Marat Zakirov
2014-08-06 14:12 ` [PINGv3][PATCH] " Marat Zakirov
2014-08-06 14:14 ` Ramana Radhakrishnan
2014-08-06 14:44 ` Richard Earnshaw
2014-08-07 7:37 ` Marat Zakirov
2014-08-07 8:01 ` Ramana Radhakrishnan
2014-08-07 8:11 ` Marat Zakirov
2014-08-07 8:50 ` Richard Earnshaw
2014-08-07 9:02 ` Marat Zakirov
2014-08-07 13:52 ` Marat Zakirov
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).