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* [AArch64/GCC][0/N] Refactor prologue/epilogue code and optimize insns generated
@ 2014-07-22 14:49 Jiong Wang
  0 siblings, 0 replies; only message in thread
From: Jiong Wang @ 2014-07-22 14:49 UTC (permalink / raw)
  To: gcc-patches

currently, the implementation of AArch64 prologue/epilogue expand
hooks are a bit unclean.

the major issues are:

   * when pushing callee-saved registers, register offset are
     calculated by ad-hoc code instead of referencing offset
     table initialized in aarch64_layout_frame.
   * FP/LR push/restore are done by ad-hoc code, should be
     unified with other registers.
   * various duplicated code for pushing/restoring core and
     vectore registers.
   * sub-optimal instruction sequences generated for some
     scenarios.

the following patch set trying to address above issues in
an incremental way, that the review could be easier.

no regression on aarch64-none-elf little/big endian bare-metal full test.
bootstrap OK on aarch64.

ok to install?

thanks.

-- Jiong


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2014-07-22 14:49 [AArch64/GCC][0/N] Refactor prologue/epilogue code and optimize insns generated Jiong Wang

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