* [AArch64/GCC][8/N] Refactor code out into 'aarch64_next_callee_save'
@ 2014-07-22 14:51 Jiong Wang
2014-07-23 16:18 ` Marcus Shawcroft
0 siblings, 1 reply; 2+ messages in thread
From: Jiong Wang @ 2014-07-22 14:51 UTC (permalink / raw)
To: gcc-patches
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This patch refactor the inner loop out into "aarch64_next_callee_save",
and simplify the code logic and reduce indent.
*no functional change*
ok to install?
thanks.
gcc/
* config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
(aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
(aarch64_save_or_restore_callee_save_registers): Likewise.
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From 923dfe3a6daa90d4e4b20ba657b05c8ef55383b1 Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.wang@arm.com>
Date: Tue, 17 Jun 2014 22:08:37 +0100
Subject: [PATCH 08/19] [AArch64/GCC][8/20]Refactor code out into
'aarch64_next_callee_save'
This patch refactor the inner loop out into "aarch64_next_callee_save", and
simplify the code logic and reduce indent.
*no functional change*
2014-06-16 Jiong Wang <jiong.wang@arm.com>
Marcus Shawcroft <marcus.shawcroft@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
(aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
(aarch64_save_or_restore_callee_save_registers): Likewise.
---
gcc/config/aarch64/aarch64.c | 188 ++++++++++++++++++++----------------------
1 file changed, 89 insertions(+), 99 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 07358fe..0b6305b 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1905,6 +1905,13 @@ aarch64_register_saved_on_entry (int regno)
return cfun->machine->frame.reg_offset[regno] >= 0;
}
+static unsigned
+aarch64_next_callee_save (unsigned regno, unsigned limit)
+{
+ while (regno <= limit && !aarch64_register_saved_on_entry (regno))
+ regno ++;
+ return regno;
+}
static void
aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, bool restore)
@@ -1915,64 +1922,56 @@ aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, bool restore)
rtx (*gen_mem_ref) (enum machine_mode, rtx)
= frame_pointer_needed ? gen_frame_mem : gen_rtx_MEM;
- for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++)
+
+ for (regno = aarch64_next_callee_save (V0_REGNUM, V31_REGNUM);
+ regno <= V31_REGNUM;
+ regno = aarch64_next_callee_save (regno + 1, V31_REGNUM))
{
- if (aarch64_register_saved_on_entry (regno))
- {
- rtx reg = gen_rtx_REG (DFmode, regno);
- rtx mem;
+ rtx reg = gen_rtx_REG (DFmode, regno);
+ rtx mem;
- HOST_WIDE_INT offset = start_offset
- + cfun->machine->frame.reg_offset[regno];
- mem = gen_mem_ref (DFmode, plus_constant (Pmode, stack_pointer_rtx,
- offset));
+ HOST_WIDE_INT offset = start_offset
+ + cfun->machine->frame.reg_offset[regno];
+ mem = gen_mem_ref (DFmode, plus_constant (Pmode, stack_pointer_rtx,
+ offset));
- for (regno2 = regno + 1;
- regno2 <= V31_REGNUM
- && !aarch64_register_saved_on_entry (regno2);
- regno2++)
- {
- /* Empty loop. */
- }
+ regno2 = aarch64_next_callee_save (regno + 1, V31_REGNUM);
- if (regno2 <= V31_REGNUM
- && aarch64_register_saved_on_entry (regno2))
- {
- rtx reg2 = gen_rtx_REG (DFmode, regno2);
- rtx mem2;
-
- offset = start_offset + cfun->machine->frame.reg_offset[regno2];
- mem2 = gen_mem_ref (DFmode,
- plus_constant (Pmode, stack_pointer_rtx,
- offset));
- if (restore == false)
- insn = emit_insn (gen_store_pairdf (mem, reg, mem2, reg2));
- else
- {
- insn = emit_insn (gen_load_pairdf (reg, mem, reg2, mem2));
- add_reg_note (insn, REG_CFA_RESTORE, reg);
- add_reg_note (insn, REG_CFA_RESTORE, reg2);
- }
+ if (regno2 <= V31_REGNUM)
+ {
+ rtx reg2 = gen_rtx_REG (DFmode, regno2);
+ rtx mem2;
- /* The first part of a frame-related parallel insn is
- always assumed to be relevant to the frame
- calculations; subsequent parts, are only
- frame-related if explicitly marked. */
- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
- regno = regno2;
+ offset = start_offset + cfun->machine->frame.reg_offset[regno2];
+ mem2 = gen_mem_ref (DFmode,
+ plus_constant (Pmode, stack_pointer_rtx, offset));
+ if (restore == false)
+ insn = emit_insn (gen_store_pairdf (mem, reg, mem2, reg2));
+ else
+ {
+ insn = emit_insn (gen_load_pairdf (reg, mem, reg2, mem2));
+ add_reg_note (insn, REG_CFA_RESTORE, reg);
+ add_reg_note (insn, REG_CFA_RESTORE, reg2);
}
+
+ /* The first part of a frame-related parallel insn is
+ always assumed to be relevant to the frame
+ calculations; subsequent parts, are only
+ frame-related if explicitly marked. */
+ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
+ regno = regno2;
+ }
+ else
+ {
+ if (restore == false)
+ insn = emit_move_insn (mem, reg);
else
{
- if (restore == false)
- insn = emit_move_insn (mem, reg);
- else
- {
- insn = emit_move_insn (reg, mem);
- add_reg_note (insn, REG_CFA_RESTORE, reg);
- }
+ insn = emit_move_insn (reg, mem);
+ add_reg_note (insn, REG_CFA_RESTORE, reg);
}
- RTX_FRAME_RELATED_P (insn) = 1;
}
+ RTX_FRAME_RELATED_P (insn) = 1;
}
}
@@ -1990,68 +1989,59 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
unsigned regno;
unsigned regno2;
- for (regno = R0_REGNUM; regno <= limit; regno++)
+ for (regno = aarch64_next_callee_save (R0_REGNUM, limit);
+ regno <= limit;
+ regno = aarch64_next_callee_save (regno + 1, limit))
{
- if (aarch64_register_saved_on_entry (regno))
- {
- rtx reg = gen_rtx_REG (DImode, regno);
- rtx mem;
+ rtx reg = gen_rtx_REG (DImode, regno);
+ rtx mem;
- HOST_WIDE_INT offset = start_offset
- + cfun->machine->frame.reg_offset[regno];
- mem = gen_mem_ref (Pmode, plus_constant (Pmode, stack_pointer_rtx,
- offset));
+ HOST_WIDE_INT offset = start_offset
+ + cfun->machine->frame.reg_offset[regno];
+ mem = gen_mem_ref (Pmode, plus_constant (Pmode, stack_pointer_rtx,
+ offset));
- for (regno2 = regno + 1;
- regno2 <= limit
- && !aarch64_register_saved_on_entry (regno2);
- regno2++)
- {
- /* Empty loop. */
- }
+ regno2 = aarch64_next_callee_save (regno + 1, limit);
- if (regno2 <= limit
- && aarch64_register_saved_on_entry (regno2)
- && ((cfun->machine->frame.reg_offset[regno] + UNITS_PER_WORD)
- == cfun->machine->frame.reg_offset[regno2]))
- {
- rtx reg2 = gen_rtx_REG (DImode, regno2);
- rtx mem2;
-
- offset = start_offset + cfun->machine->frame.reg_offset[regno2];
- mem2 = gen_mem_ref (Pmode,
- plus_constant (Pmode, stack_pointer_rtx,
- offset));
- if (restore == false)
- insn = emit_insn (gen_store_pairdi (mem, reg, mem2, reg2));
- else
- {
- insn = emit_insn (gen_load_pairdi (reg, mem, reg2, mem2));
- add_reg_note (insn, REG_CFA_RESTORE, reg);
- add_reg_note (insn, REG_CFA_RESTORE, reg2);
- }
+ if (regno2 <= limit
+ && ((cfun->machine->frame.reg_offset[regno] + UNITS_PER_WORD)
+ == cfun->machine->frame.reg_offset[regno2]))
+
+ {
+ rtx reg2 = gen_rtx_REG (DImode, regno2);
+ rtx mem2;
- /* The first part of a frame-related parallel insn is
- always assumed to be relevant to the frame
- calculations; subsequent parts, are only
- frame-related if explicitly marked. */
- RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
- regno = regno2;
+ offset = start_offset + cfun->machine->frame.reg_offset[regno2];
+ mem2 = gen_mem_ref (Pmode,
+ plus_constant (Pmode, stack_pointer_rtx, offset));
+ if (restore == false)
+ insn = emit_insn (gen_store_pairdi (mem, reg, mem2, reg2));
+ else
+ {
+ insn = emit_insn (gen_load_pairdi (reg, mem, reg2, mem2));
+ add_reg_note (insn, REG_CFA_RESTORE, reg);
+ add_reg_note (insn, REG_CFA_RESTORE, reg2);
}
+
+ /* The first part of a frame-related parallel insn is
+ always assumed to be relevant to the frame
+ calculations; subsequent parts, are only
+ frame-related if explicitly marked. */
+ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
+ regno = regno2;
+ }
+ else
+ {
+ if (restore == false)
+ insn = emit_move_insn (mem, reg);
else
{
- if (restore == false)
- insn = emit_move_insn (mem, reg);
- else
- {
- insn = emit_move_insn (reg, mem);
- add_reg_note (insn, REG_CFA_RESTORE, reg);
- }
+ insn = emit_move_insn (reg, mem);
+ add_reg_note (insn, REG_CFA_RESTORE, reg);
}
- RTX_FRAME_RELATED_P (insn) = 1;
}
+ RTX_FRAME_RELATED_P (insn) = 1;
}
-
aarch64_save_or_restore_fprs (start_offset, restore);
}
--
1.7.9.5
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [AArch64/GCC][8/N] Refactor code out into 'aarch64_next_callee_save'
2014-07-22 14:51 [AArch64/GCC][8/N] Refactor code out into 'aarch64_next_callee_save' Jiong Wang
@ 2014-07-23 16:18 ` Marcus Shawcroft
0 siblings, 0 replies; 2+ messages in thread
From: Marcus Shawcroft @ 2014-07-23 16:18 UTC (permalink / raw)
To: Jiong Wang; +Cc: gcc-patches
On 22 July 2014 15:51, Jiong Wang <jiong.wang@arm.com> wrote:
> gcc/
> * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
> (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
> (aarch64_save_or_restore_callee_save_registers): Likewise.
OK and applied.
/Marcus
^ permalink raw reply [flat|nested] 2+ messages in thread
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