From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30323 invoked by alias); 22 Jul 2014 14:51:53 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 30233 invoked by uid 89); 22 Jul 2014 14:51:52 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 22 Jul 2014 14:51:42 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Tue, 22 Jul 2014 15:51:39 +0100 Received: from [10.1.205.157] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 22 Jul 2014 15:51:38 +0100 Message-ID: <53CE7A7A.4090505@arm.com> Date: Tue, 22 Jul 2014 14:51:00 -0000 From: Jiong Wang User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.1 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org Subject: [AArch64/GCC][10/N] Unify vector and core register save/restore code as one copy X-MC-Unique: 114072215513907301 Content-Type: multipart/mixed; boundary="------------040504030703010607070509" X-IsSubscribed: yes X-SW-Source: 2014-07/txt/msg01455.txt.bz2 This is a multi-part message in MIME format. --------------040504030703010607070509 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: quoted-printable Content-length: 320 vector and core register push/restore code are duplicated. this patch unify them as one copy. *no functional change* ok to install? thanks. gcc/ * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted. (aarch64_save_callee_saves): New function to handle reg save for both core and vectore regs. --------------040504030703010607070509 Content-Type: text/x-patch; name=0010-AArch64-GCC-10-20-Unify-vector-and-core-register-sav.patch Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename*0="0010-AArch64-GCC-10-20-Unify-vector-and-core-register-sav.pa"; filename*1="tch" Content-length: 6560 >From c2ad6fd2dc3bfb5a868f61de42851762c9d7bfac Mon Sep 17 00:00:00 2001 From: Jiong Wang Date: Tue, 17 Jun 2014 22:12:28 +0100 Subject: [PATCH 10/19] [AArch64/GCC][10/20]Unify vector and core register save/restore code as one copy vector and core register push/restore code are duplicated. this patch unify them as one copy. *no functional change* 2014-06-16 Jiong Wang Marcus Shawcroft gcc/ * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted. (aarch64_save_callee_save_common): New function to handle reg save for both core and vectore regs. --- gcc/config/aarch64/aarch64.c | 100 ++++++++++----------------------------= ---- 1 file changed, 24 insertions(+), 76 deletions(-) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index c4ea9ec..4e35ebc 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -1947,93 +1947,32 @@ aarch64_gen_load_pair (enum machine_mode mode, rtx = reg1, rtx mem1, rtx reg2, } } =20 -static void -aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, bool restore) -{ - unsigned regno; - unsigned regno2; - rtx insn; - rtx (*gen_mem_ref) (enum machine_mode, rtx) - =3D frame_pointer_needed ? gen_frame_mem : gen_rtx_MEM; - - - for (regno =3D aarch64_next_callee_save (V0_REGNUM, V31_REGNUM); - regno <=3D V31_REGNUM; - regno =3D aarch64_next_callee_save (regno + 1, V31_REGNUM)) - { - rtx reg =3D gen_rtx_REG (DFmode, regno); - rtx mem; - - HOST_WIDE_INT offset =3D start_offset - + cfun->machine->frame.reg_offset[regno]; - mem =3D gen_mem_ref (DFmode, plus_constant (Pmode, stack_pointer_rtx, - offset)); - - regno2 =3D aarch64_next_callee_save (regno + 1, V31_REGNUM); - - if (regno2 <=3D V31_REGNUM) - { - rtx reg2 =3D gen_rtx_REG (DFmode, regno2); - rtx mem2; - - offset =3D start_offset + cfun->machine->frame.reg_offset[regno2]; - mem2 =3D gen_mem_ref (DFmode, - plus_constant (Pmode, stack_pointer_rtx, offset)); - if (restore =3D=3D false) - insn =3D emit_insn (aarch64_gen_store_pair (DFmode, mem, reg, mem2, r= eg2)); - else - { - insn =3D emit_insn (aarch64_gen_load_pair (DFmode, reg, mem, reg2, = mem2)); - add_reg_note (insn, REG_CFA_RESTORE, reg); - add_reg_note (insn, REG_CFA_RESTORE, reg2); - } - - /* The first part of a frame-related parallel insn is - always assumed to be relevant to the frame - calculations; subsequent parts, are only - frame-related if explicitly marked. */ - RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) =3D 1; - regno =3D regno2; - } - else - { - if (restore =3D=3D false) - insn =3D emit_move_insn (mem, reg); - else - { - insn =3D emit_move_insn (reg, mem); - add_reg_note (insn, REG_CFA_RESTORE, reg); - } - } - RTX_FRAME_RELATED_P (insn) =3D 1; - } -} - =20 /* offset from the stack pointer of where the saves and restore's have to happen. */ static void -aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset, - bool restore) +aarch64_save_or_restore_callee_saves (enum machine_mode mode, + HOST_WIDE_INT start_offset, + unsigned start, unsigned limit, + bool restore) { rtx insn; rtx (*gen_mem_ref) (enum machine_mode, rtx) =3D (frame_pointer_needed ? gen_frame_mem : gen_rtx_MEM); - unsigned limit =3D frame_pointer_needed ? R28_REGNUM : R30_REGNUM; unsigned regno; unsigned regno2; =20 - for (regno =3D aarch64_next_callee_save (R0_REGNUM, limit); + for (regno =3D aarch64_next_callee_save (start, limit); regno <=3D limit; regno =3D aarch64_next_callee_save (regno + 1, limit)) { - rtx reg =3D gen_rtx_REG (DImode, regno); + rtx reg =3D gen_rtx_REG (mode, regno); rtx mem; =20 HOST_WIDE_INT offset =3D start_offset + cfun->machine->frame.reg_offset[regno]; - mem =3D gen_mem_ref (Pmode, plus_constant (Pmode, stack_pointer_rtx, - offset)); + mem =3D gen_mem_ref (mode, plus_constant (Pmode, stack_pointer_rtx, + offset)); =20 regno2 =3D aarch64_next_callee_save (regno + 1, limit); =20 @@ -2042,17 +1981,19 @@ aarch64_save_or_restore_callee_save_registers (HOST= _WIDE_INT start_offset, =3D=3D cfun->machine->frame.reg_offset[regno2])) =20 { - rtx reg2 =3D gen_rtx_REG (DImode, regno2); + rtx reg2 =3D gen_rtx_REG (mode, regno2); rtx mem2; =20 offset =3D start_offset + cfun->machine->frame.reg_offset[regno2]; - mem2 =3D gen_mem_ref (Pmode, + mem2 =3D gen_mem_ref (mode, plus_constant (Pmode, stack_pointer_rtx, offset)); if (restore =3D=3D false) - insn =3D emit_insn (aarch64_gen_store_pair (DImode, mem, reg, mem2, r= eg2)); + insn =3D emit_insn (aarch64_gen_store_pair (mode, mem, reg, mem2, + reg2)); else { - insn =3D emit_insn (aarch64_gen_load_pair (DImode, reg, mem, reg2, = mem2)); + insn =3D emit_insn (aarch64_gen_load_pair (mode, reg, mem, reg2, + mem2)); add_reg_note (insn, REG_CFA_RESTORE, reg); add_reg_note (insn, REG_CFA_RESTORE, reg2); } @@ -2076,7 +2017,6 @@ aarch64_save_or_restore_callee_save_registers (HOST_W= IDE_INT start_offset, } RTX_FRAME_RELATED_P (insn) =3D 1; } - aarch64_save_or_restore_fprs (start_offset, restore); } =20 /* AArch64 stack frames generated by this compiler look like: @@ -2269,7 +2209,11 @@ aarch64_expand_prologue (void) RTX_FRAME_RELATED_P (insn) =3D 1; } =20 - aarch64_save_or_restore_callee_save_registers (fp_offset, 0); + aarch64_save_or_restore_callee_saves (DImode, fp_offset, R0_REGNUM, + frame_pointer_needed + ? R28_REGNUM : R30_REGNUM, false); + aarch64_save_or_restore_callee_saves (DFmode, fp_offset, V0_REGNUM, + V31_REGNUM, false); } =20 /* when offset >=3D 512, @@ -2340,7 +2284,11 @@ aarch64_expand_epilogue (bool for_sibcall) cfa_reg =3D stack_pointer_rtx; } =20 - aarch64_save_or_restore_callee_save_registers (fp_offset, 1); + aarch64_save_or_restore_callee_saves (DImode, fp_offset, R0_REGNUM, + frame_pointer_needed + ? R28_REGNUM : R30_REGNUM, true); + aarch64_save_or_restore_callee_saves (DFmode, fp_offset, V0_REGNUM, + V31_REGNUM, true); =20 /* Restore the frame pointer and lr if the frame pointer is needed. */ if (offset > 0) --=20 1.7.9.5 --------------040504030703010607070509--