From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 32438 invoked by alias); 22 Jul 2014 14:52:13 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 32343 invoked by uid 89); 22 Jul 2014 14:52:13 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: service87.mimecast.com Received: from service87.mimecast.com (HELO service87.mimecast.com) (91.220.42.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 22 Jul 2014 14:52:08 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.21]) by service87.mimecast.com; Tue, 22 Jul 2014 15:52:06 +0100 Received: from [10.1.205.157] ([10.1.255.212]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 22 Jul 2014 15:52:05 +0100 Message-ID: <53CE7A94.5080509@arm.com> Date: Tue, 22 Jul 2014 14:52:00 -0000 From: Jiong Wang User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.1 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org Subject: [AArch64/GCC][15/N] Add two new frame fields X-MC-Unique: 114072215520601601 Content-Type: multipart/mixed; boundary="------------040503080305080607080209" X-IsSubscribed: yes X-SW-Source: 2014-07/txt/msg01460.txt.bz2 This is a multi-part message in MIME format. --------------040503080305080607080209 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: quoted-printable Content-length: 625 Add two new frame fields: * cfun->machine->frame.wb_candidate1 * cfun->machine->frame.wb_candidate2 =20=20=20=20 * wb_candidate1 to record the first reg index which could carry write-back. * wb_candidate2 to record the second reg index which could form reg pair with * wb_candidate1 to carry write-back when doing paired load/store. They are useful in later pro/epi optimization. *no functional change* ok to install? thanks. gcc/ * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and "wb_c= andidate2". * config/aarch64/aarch64.c (aarch64_layout_frame): Calcualte new added f= ields. --------------040503080305080607080209 Content-Type: text/x-patch; name=0015-AArch64-GCC-16-20-Add-two-new-frame-fields.patch Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename*0="0015-AArch64-GCC-16-20-Add-two-new-frame-fields.patch" Content-length: 3573 >From 1272a5bcbb7978452cef1d0da507500c459031c5 Mon Sep 17 00:00:00 2001 From: Jiong Wang Date: Tue, 17 Jun 2014 22:21:44 +0100 Subject: [PATCH 15/19] [AArch64/GCC][16/20] Add two new frame fields Add two new frame fields: * cfun->machine->frame.wb_candidate1 * cfun->machine->frame.wb_candidate2 wb_candidate1 to record the first reg index which could carry write-back. wb_candidate2 to record the second reg index which could form reg pair with wb_candidate1 to carry write-back when doing paired load/store. They are useful in later pro/epi optimization. *no functional change* 2014-06-16 Jiong Wang Marcus Shawcroft gcc/ * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and "wb_candidate2". * config/aarch64/aarch64.c (aarch64_layout_frame): Calcualte new added fi= elds. --- gcc/config/aarch64/aarch64.c | 14 ++++++++++++++ gcc/config/aarch64/aarch64.h | 3 +++ 2 files changed, 17 insertions(+) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 65a84e8..a6b253a 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -1815,6 +1815,9 @@ aarch64_layout_frame (void) #define SLOT_NOT_REQUIRED (-2) #define SLOT_REQUIRED (-1) =20 + cfun->machine->frame.wb_candidate1 =3D FIRST_PSEUDO_REGISTER; + cfun->machine->frame.wb_candidate2 =3D FIRST_PSEUDO_REGISTER; + /* First mark all the registers that really need to be saved... */ for (regno =3D R0_REGNUM; regno <=3D R30_REGNUM; regno++) cfun->machine->frame.reg_offset[regno] =3D SLOT_NOT_REQUIRED; @@ -1843,7 +1846,9 @@ aarch64_layout_frame (void) { /* FP and LR are placed in the linkage record. */ cfun->machine->frame.reg_offset[R29_REGNUM] =3D 0; + cfun->machine->frame.wb_candidate1 =3D R29_REGNUM; cfun->machine->frame.reg_offset[R30_REGNUM] =3D UNITS_PER_WORD; + cfun->machine->frame.wb_candidate2 =3D R30_REGNUM; cfun->machine->frame.hardfp_offset =3D 2 * UNITS_PER_WORD; offset +=3D 2 * UNITS_PER_WORD; } @@ -1853,6 +1858,10 @@ aarch64_layout_frame (void) if (cfun->machine->frame.reg_offset[regno] =3D=3D SLOT_REQUIRED) { cfun->machine->frame.reg_offset[regno] =3D offset; + if (cfun->machine->frame.wb_candidate1 =3D=3D FIRST_PSEUDO_REGISTER) + cfun->machine->frame.wb_candidate1 =3D regno; + else if (cfun->machine->frame.wb_candidate2 =3D=3D FIRST_PSEUDO_REGISTER) + cfun->machine->frame.wb_candidate2 =3D regno; offset +=3D UNITS_PER_WORD; } =20 @@ -1860,6 +1869,11 @@ aarch64_layout_frame (void) if (cfun->machine->frame.reg_offset[regno] =3D=3D SLOT_REQUIRED) { cfun->machine->frame.reg_offset[regno] =3D offset; + if (cfun->machine->frame.wb_candidate1 =3D=3D FIRST_PSEUDO_REGISTER) + cfun->machine->frame.wb_candidate1 =3D regno; + else if (cfun->machine->frame.wb_candidate2 =3D=3D FIRST_PSEUDO_REGISTER + && cfun->machine->frame.wb_candidate1 >=3D V0_REGNUM) + cfun->machine->frame.wb_candidate2 =3D regno; offset +=3D UNITS_PER_WORD; } =20 diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index b95365a..ee70a18 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -542,6 +542,9 @@ struct GTY (()) aarch64_frame * frame (incomming SP) to the stack_pointer. This value is always * a multiple of STACK_BOUNDARY. */ =20 + unsigned wb_candidate1; + unsigned wb_candidate2; + HOST_WIDE_INT frame_size; =20 bool laid_out; --=20 1.7.9.5 --------------040503080305080607080209--