From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29797 invoked by alias); 7 Aug 2014 08:11:02 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 29786 invoked by uid 89); 7 Aug 2014 08:11:01 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 X-HELO: mailout2.w1.samsung.com Received: from mailout2.w1.samsung.com (HELO mailout2.w1.samsung.com) (210.118.77.12) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (DES-CBC3-SHA encrypted) ESMTPS; Thu, 07 Aug 2014 08:10:59 +0000 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N9X00LDTG1PUB30@mailout2.w1.samsung.com> for gcc-patches@gcc.gnu.org; Thu, 07 Aug 2014 09:10:37 +0100 (BST) Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 71.51.25543.F8433E35; Thu, 07 Aug 2014 09:10:55 +0100 (BST) Received: from [106.109.129.103] by eusync3.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0N9X00DOLG26WC30@eusync3.samsung.com>; Thu, 07 Aug 2014 09:10:55 +0100 (BST) Message-id: <53E3348E.5040202@samsung.com> Date: Thu, 07 Aug 2014 08:11:00 -0000 From: Marat Zakirov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.0 MIME-version: 1.0 To: ramrad01@arm.com Cc: Richard Earnshaw , Ramana Radhakrishnan , "gcc-patches@gcc.gnu.org" , Kyrylo Tkachov , Christophe Lyon , Slava Garbuzov , Yury Gribov Subject: Re: [PINGv3][PATCH] Fix for PR 61561 References: <53BE8EA4.7080803@arm.com> <53BFA9A9.4090209@samsung.com> <53C64468.9000506@samsung.com> <53C646BB.6020905@arm.com> <53C7B202.3070401@samsung.com> <53CFB98D.50005@samsung.com> <53D8EB65.7040303@samsung.com> <53E237CE.7050702@samsung.com> <53E23832.4070707@arm.com> <53E23F38.5020400@arm.com> <53E32C99.9020202@samsung.com> In-reply-to: Content-type: multipart/mixed; boundary=------------020001000402060300090000 X-SW-Source: 2014-08/txt/msg00770.txt.bz2 This is a multi-part message in MIME format. --------------020001000402060300090000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-length: 1355 --Marat On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote: > On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov wrote: >> Thank you. >> >> $ svn commit >> Sending gcc/ChangeLog >> Sending gcc/config/arm/thumb1.md >> Sending gcc/config/arm/thumb2.md >> Transmitting file data ... >> Committed revision 213695. >> >> P.S. >> >> Minor nit was reg. tested. > Another minor nit - please send the patch you committed to be archived > on the mailing list. > > regards > Ramana > >> >> On 08/06/2014 06:44 PM, Richard Earnshaw wrote: >>> On 06/08/14 15:14, Ramana Radhakrishnan wrote: >>>> >>>> This is OK thanks. >>>> >>>> >>>> Ramana >>>> >>> Hmm, minor nit. >>> >>> (define_insn "*thumb1_movhi_insn" >>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l") >>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))] >>> + (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))] >>> >>> This would be better expressed as: >>> >>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l") >>> (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))] >>> >>> that is, to use the 4th alternative. That's because the use of SP in >>> these operations does not clobber the flags. >>> >>> Similarly for the movqi pattern. >>> >>> R. >>> >>> --------------020001000402060300090000 Content-Type: text/x-patch; name="thumb2.diff" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="thumb2.diff" Content-length: 1789 gcc/ChangeLog: 2014-08-07 Marat Zakirov * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer. (*thumb1_movqi_insn): Likewise. * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise. diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index cd1adf4..fed741e 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -707,8 +707,8 @@ ) (define_insn "*thumb1_movhi_insn" - [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l") - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))] + [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l") + (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))] "TARGET_THUMB1 && ( register_operand (operands[0], HImode) || register_operand (operands[1], HImode))" @@ -762,7 +762,7 @@ (define_insn "*thumb1_movqi_insn" [(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l") - (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))] + (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))] "TARGET_THUMB1 && ( register_operand (operands[0], QImode) || register_operand (operands[1], QImode))" diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 029a679..983b59d 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -318,7 +318,7 @@ ;; of the messiness associated with the ARM patterns. (define_insn "*thumb2_movhi_insn" [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r") - (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))] + (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))] "TARGET_THUMB2 && (register_operand (operands[0], HImode) || register_operand (operands[1], HImode))" --------------020001000402060300090000--