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* [PATCH][ARM] Delete f_sels, f_seld types, use fcsel instead
@ 2014-08-07 11:26 Kyrill Tkachov
  2014-08-07 14:27 ` Richard Earnshaw
  0 siblings, 1 reply; 2+ messages in thread
From: Kyrill Tkachov @ 2014-08-07 11:26 UTC (permalink / raw)
  To: GCC Patches; +Cc: Ramana Radhakrishnan, Richard Earnshaw

[-- Attachment #1: Type: text/plain, Size: 732 bytes --]

Hi all,

During the great types rework this must have slipped through the cracks. 
We had two different types to describe the fcsel (A64) and vsel (A32) 
instructions: fcsel and f_sel[s,d].
In the A53 pipeline description we use fcsel, so the AArch32 version was 
presumably scheduled improperly
This patch removes the f_sel[s,d] (I don't think we need the granularity 
for any cores) types and gets the cmov pattern in arm.md to use the 
fcsel like the equivalent aarch64.md pattern.

Tested arm-none-eabi on an emulator.

Ok for trunk?

2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

     * config/arm/arm.md (*cmov<mode>): Set type attribute to fcsel.
     * config/arm/types.md (f_sels, f_seld): Delete.

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: arm-fcsel.patch --]
[-- Type: text/x-patch; name=arm-fcsel.patch, Size: 1089 bytes --]

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 6ae240e..397da96 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -7416,7 +7416,7 @@
     return \"\";
   }"
   [(set_attr "conds" "use")
-   (set_attr "type" "f_sel<vfp_type>")]
+   (set_attr "type" "fcsel")]
 )
 
 (define_insn_and_split "*movsicc_insn"
diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md
index efbf7a7..f4feb2d 100644
--- a/gcc/config/arm/types.md
+++ b/gcc/config/arm/types.md
@@ -66,7 +66,6 @@
 ; f_mrc              transfer vfp to arm reg.
 ; f_mrrc             transfer vfp to two arm regs.
 ; f_rint[d,s]        double/single floating point rount to integral.
-; f_sel[d,s]         double/single floating byte select.
 ; f_store[d,s]       double/single store to memory.  Used for VFP unit.
 ; fadd[d,s]          double/single floating-point scalar addition.
 ; fcmp[d,s]          double/single floating-point compare.
@@ -571,8 +570,6 @@
   f_mrrc,\
   f_rintd,\
   f_rints,\
-  f_seld,\
-  f_sels,\
   f_stored,\
   f_stores,\
   faddd,\

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH][ARM] Delete f_sels, f_seld types, use fcsel instead
  2014-08-07 11:26 [PATCH][ARM] Delete f_sels, f_seld types, use fcsel instead Kyrill Tkachov
@ 2014-08-07 14:27 ` Richard Earnshaw
  0 siblings, 0 replies; 2+ messages in thread
From: Richard Earnshaw @ 2014-08-07 14:27 UTC (permalink / raw)
  To: Kyrill Tkachov; +Cc: GCC Patches, Ramana Radhakrishnan

On 07/08/14 12:26, Kyrill Tkachov wrote:
> Hi all,
> 
> During the great types rework this must have slipped through the cracks. 
> We had two different types to describe the fcsel (A64) and vsel (A32) 
> instructions: fcsel and f_sel[s,d].
> In the A53 pipeline description we use fcsel, so the AArch32 version was 
> presumably scheduled improperly
> This patch removes the f_sel[s,d] (I don't think we need the granularity 
> for any cores) types and gets the cmov pattern in arm.md to use the 
> fcsel like the equivalent aarch64.md pattern.
> 
> Tested arm-none-eabi on an emulator.
> 
> Ok for trunk?
> 
> 2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> 
>      * config/arm/arm.md (*cmov<mode>): Set type attribute to fcsel.
>      * config/arm/types.md (f_sels, f_seld): Delete.
> 
> 

OK.  I guess if we ever do need to distinguish between 32-bit and 64-bit
selects we can add the s/d distinction back in.

R.


^ permalink raw reply	[flat|nested] 2+ messages in thread

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