From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26215 invoked by alias); 29 Aug 2014 18:45:11 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 26203 invoked by uid 89); 29 Aug 2014 18:45:11 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.6 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Fri, 29 Aug 2014 18:45:10 +0000 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s7TIj7Gq001313 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 29 Aug 2014 14:45:08 -0400 Received: from stumpy.slc.redhat.com (ovpn-113-40.phx2.redhat.com [10.3.113.40]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s7TIj6fL020036; Fri, 29 Aug 2014 14:45:06 -0400 Message-ID: <5400CA32.8020904@redhat.com> Date: Fri, 29 Aug 2014 18:45:00 -0000 From: Jeff Law User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.7.0 MIME-Version: 1.0 To: Uros Bizjak , Ilya Enkovich CC: gcc@gnu.org, "gcc-patches@gcc.gnu.org" Subject: Re: Enable EBX for x86 in 32bits PIC code References: <20140707114750.GB31640@tucnak.redhat.com> <20140822121151.GA60032@msticlxl57.ims.intel.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes X-SW-Source: 2014-08/txt/msg02654.txt.bz2 On 08/28/14 12:58, Uros Bizjak wrote: > On Fri, Aug 22, 2014 at 2:21 PM, Ilya Enkovich wrote: > >> On Cauldron 2014 we had a couple of talks about relaxation of ebx usage in 32bit PIC mode. It was decided that the best approach would be to not fix ebx register, use speudo register for GOT base address and let allocator do the rest. This should be similar to how clang and icc work with GOT base address. I've been working for some time on such patch and now want to share my results. > >> (define_insn "*pushtf" >> [(set (match_operand:TF 0 "push_operand" "=<,<") >> - (match_operand:TF 1 "general_no_elim_operand" "x,*roF"))] >> + (match_operand:TF 1 "nonimmediate_no_elim_operand" "x,*roF"))] > > Can you please explain the reason for this change (and a couple of > similar changes to push patterns) ? I'd recommend dropping them from the WIP postings. jeff