From: Georg-Johann Lay <avr@gjlay.de>
To: GCC Patches <gcc-patches@gcc.gnu.org>
Cc: Denis Chertykov <chertykov@gmail.com>
Subject: [patch,avr] tweak sign extensions
Date: Thu, 23 Oct 2014 13:54:00 -0000 [thread overview]
Message-ID: <5449071E.8040909@gjlay.de> (raw)
[-- Attachment #1: Type: text/plain, Size: 416 bytes --]
This optimization makes most sign-extensions one instruction shorter in the
case when the source register may be clobbered and the register numbers are
different. Source and destination may overlap.
Ok for trunk?
Johann
gcc/
* config/avr/avr.md (extendqihi2, extendqipsi2, extendqisi2)
(extendhipsi2, extendhisi2): Optimize if source reg is unused
after the insns and has different REGNO than destination.
[-- Attachment #2: tweak-extend.diff --]
[-- Type: text/x-patch, Size: 4055 bytes --]
Index: config/avr/avr.md
===================================================================
--- config/avr/avr.md (revision 216592)
+++ config/avr/avr.md (working copy)
@@ -4174,9 +4174,14 @@ (define_insn "extendqihi2"
[(set (match_operand:HI 0 "register_operand" "=r,r")
(sign_extend:HI (match_operand:QI 1 "combine_pseudo_register_operand" "0,*r")))]
""
- "@
- clr %B0\;sbrc %0,7\;com %B0
- mov %A0,%A1\;clr %B0\;sbrc %A0,7\;com %B0"
+ {
+ if (REGNO (operands[0]) == REGNO (operands[1]))
+ return "clr %B0\;sbrc %0,7\;com %B0";
+ else if (reg_unused_after (insn, operands[1]))
+ return "mov %A0,%1\;lsl %1\;sbc %B0,%B0";
+ else
+ return "mov %A0,%1\;clr %B0\;sbrc %A0,7\;com %B0";
+ }
[(set_attr "length" "3,4")
(set_attr "cc" "set_n,set_n")])
@@ -4184,9 +4189,14 @@ (define_insn "extendqipsi2"
[(set (match_operand:PSI 0 "register_operand" "=r,r")
(sign_extend:PSI (match_operand:QI 1 "combine_pseudo_register_operand" "0,*r")))]
""
- "@
- clr %B0\;sbrc %A0,7\;com %B0\;mov %C0,%B0
- mov %A0,%A1\;clr %B0\;sbrc %A0,7\;com %B0\;mov %C0,%B0"
+ {
+ if (REGNO (operands[0]) == REGNO (operands[1]))
+ return "clr %B0\;sbrc %0,7\;com %B0\;mov %C0,%B0";
+ else if (reg_unused_after (insn, operands[1]))
+ return "mov %A0,%1\;lsl %1\;sbc %B0,%B0\;mov %C0,%B0";
+ else
+ return "mov %A0,%1\;clr %B0\;sbrc %A0,7\;com %B0\;mov %C0,%B0";
+ }
[(set_attr "length" "4,5")
(set_attr "cc" "set_n,set_n")])
@@ -4194,9 +4204,14 @@ (define_insn "extendqisi2"
[(set (match_operand:SI 0 "register_operand" "=r,r")
(sign_extend:SI (match_operand:QI 1 "combine_pseudo_register_operand" "0,*r")))]
""
- "@
- clr %B0\;sbrc %A0,7\;com %B0\;mov %C0,%B0\;mov %D0,%B0
- mov %A0,%A1\;clr %B0\;sbrc %A0,7\;com %B0\;mov %C0,%B0\;mov %D0,%B0"
+ {
+ if (REGNO (operands[0]) == REGNO (operands[1]))
+ return "clr %B0\;sbrc %0,7\;com %B0\;mov %C0,%B0\;mov %D0,%B0";
+ else if (reg_unused_after (insn, operands[1]))
+ return "mov %A0,%1\;lsl %1\;sbc %B0,%B0\;mov %C0,%B0\;mov %D0,%B0";
+ else
+ return "mov %A0,%1\;clr %B0\;sbrc %A0,7\;com %B0\;mov %C0,%B0\;mov %D0,%B0";
+ }
[(set_attr "length" "5,6")
(set_attr "cc" "set_n,set_n")])
@@ -4204,10 +4219,16 @@ (define_insn "extendhipsi2"
[(set (match_operand:PSI 0 "register_operand" "=r,r ,r")
(sign_extend:PSI (match_operand:HI 1 "combine_pseudo_register_operand" "0,*r,*r")))]
""
- "@
- clr %C0\;sbrc %B0,7\;com %C0
- mov %A0,%A1\;mov %B0,%B1\;clr %C0\;sbrc %B0,7\;com %C0
- movw %A0,%A1\;clr %C0\;sbrc %B0,7\;com %C0"
+ {
+ if (REGNO (operands[0]) == REGNO (operands[1]))
+ return "clr %C0\;sbrc %B0,7\;com %C0";
+ output_asm_insn (AVR_HAVE_MOVW
+ ? "movw %A0,%A1"
+ : "mov %A0,%A1\n\tmov %B0,%B1", operands);
+ return (reg_unused_after (insn, operands[1])
+ ? "lsl %B1\;sbc %C0,%C0"
+ : "clr %C0\;sbrc %B0,7\;com %C0");
+ }
[(set_attr "length" "3,5,4")
(set_attr "isa" "*,mov,movw")
(set_attr "cc" "set_n")])
@@ -4216,10 +4237,16 @@ (define_insn "extendhisi2"
[(set (match_operand:SI 0 "register_operand" "=r,r ,r")
(sign_extend:SI (match_operand:HI 1 "combine_pseudo_register_operand" "0,*r,*r")))]
""
- "@
- clr %C0\;sbrc %B0,7\;com %C0\;mov %D0,%C0
- mov %A0,%A1\;mov %B0,%B1\;clr %C0\;sbrc %B0,7\;com %C0\;mov %D0,%C0
- movw %A0,%A1\;clr %C0\;sbrc %B0,7\;com %C0\;mov %D0,%C0"
+ {
+ if (REGNO (operands[0]) == REGNO (operands[1]))
+ return "clr %C0\;sbrc %B0,7\;com %C0\;mov %D0,%C0";
+ output_asm_insn (AVR_HAVE_MOVW
+ ? "movw %A0,%A1"
+ : "mov %A0,%A1\n\tmov %B0,%B1", operands);
+ return (reg_unused_after (insn, operands[1])
+ ? "lsl %B1\;sbc %C0,%C0\;mov %D0,%C0"
+ : "clr %C0\;sbrc %B0,7\;com %C0\;mov %D0,%C0");
+ }
[(set_attr "length" "4,6,5")
(set_attr "isa" "*,mov,movw")
(set_attr "cc" "set_n")])
next reply other threads:[~2014-10-23 13:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-23 13:54 Georg-Johann Lay [this message]
2014-10-23 18:24 ` Denis Chertykov
2014-10-24 10:39 ` [patch,avr] tweak sign extensions, take #2 Georg-Johann Lay
2014-10-24 14:03 ` Denis Chertykov
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