* [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
@ 2014-09-23 6:43 Zhenqiang Chen
2014-09-23 7:26 ` pinskia
2014-10-11 15:03 ` Richard Henderson
0 siblings, 2 replies; 8+ messages in thread
From: Zhenqiang Chen @ 2014-09-23 6:43 UTC (permalink / raw)
To: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 6522 bytes --]
Ping?
Patch is attached for easy to apply.
Thanks!
-Zhenqiang
> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> owner@gcc.gnu.org] On Behalf Of Zhenqiang Chen
> Sent: Monday, June 23, 2014 2:57 PM
> To: gcc-patches@gcc.gnu.org
> Subject: [PATCH, 1/10] two hooks for conditional compare (ccmp)
>
> Hi,
>
> The patch adds two hooks for backends to generate conditional compare
> instructions.
>
> * gen_ccmp_first is for the first compare.
> * gen_ccmp_next is for for the following compares.
>
> The patch is separated from
> https://gcc.gnu.org/ml/gcc-patches/2014-02/msg01407.html.
>
> And the original discussion about the hooks was in thread:
>
> https://gcc.gnu.org/ml/gcc-patches/2013-10/msg02601.html
>
> OK for trunk?
>
> Thanks!
> -Zhenqiang
>
> ChangeLog:
> 2014-06-23 Zhenqiang Chen <zhenqiang.chen@linaro.org>
>
> * doc/md.texi (ccmp): Add description about conditional compare
> instruction pattern.
> (TARGET_GEN_CCMP_FIRST): Define.
> (TARGET_GEN_CCMP_NEXT): Define.
> * doc/tm.texi.in (TARGET_GEN_CCMP_FIRST,
> TARGET_GEN_CCMP_NEXT): New.
> * target.def (gen_ccmp_first, gen_ccmp_first): Add two new hooks.
>
> diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index e17ffca..988c288
100644
> --- a/gcc/doc/md.texi
> +++ b/gcc/doc/md.texi
> @@ -6216,6 +6216,42 @@ A typical @code{ctrap} pattern looks like
> "@dots{}")
> @end smallexample
>
> +@cindex @code{ccmp} instruction pattern @item @samp{ccmp}
> Conditional
> +compare instruction. Operand 2 and 5 are RTLs which perform two
> +comparisons. Operand 1 is AND or IOR, which operates on the result of
> +operand 2 and 5.
> +It uses recursive method to support more than two compares. e.g.
> +
> + CC0 = CMP (a, b);
> + CC1 = CCMP (NE (CC0, 0), CMP (e, f)); ...
> + CCn = CCMP (NE (CCn-1, 0), CMP (...));
> +
> +Two target hooks are used to generate conditional compares.
> +GEN_CCMP_FISRT is used to generate the first CMP. And
> GEN_CCMP_NEXT is
> +used to generate the following CCMPs. Operand 1 is AND or IOR.
> +Operand 3 is the result of GEN_CCMP_FISRT or a previous
> GEN_CCMP_NEXT. Operand 2 is NE.
> +Operand 4, 5 and 6 is another compare expression.
> +
> +A typical CCMP pattern looks like
> +
> +@smallexample
> +(define_insn "*ccmp_and_ior"
> + [(set (match_operand 0 "dominant_cc_register" "")
> + (compare
> + (match_operator 1
> + (match_operator 2 "comparison_operator"
> + [(match_operand 3 "dominant_cc_register")
> + (const_int 0)])
> + (match_operator 4 "comparison_operator"
> + [(match_operand 5 "register_operand")
> + (match_operand 6 "compare_operand"]))
> + (const_int 0)))]
> + ""
> + "@dots{}")
> +@end smallexample
> +
> @cindex @code{prefetch} instruction pattern @item @samp{prefetch} diff
> --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index c272630..93f7c74 100644
> --- a/gcc/doc/tm.texi
> +++ b/gcc/doc/tm.texi
> @@ -11021,6 +11021,23 @@ This target hook is required only when the
> target has several different modes and they have different conditional
> execution capability, such as ARM.
> @end deftypefn
>
> +@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (int @var{code},
> rtx @var{op0}, rtx @var{op1})
> +This function emits a comparison insn for the first of a sequence of
> +conditional comparisions. It returns a comparison expression
> +appropriate for passing to @code{gen_ccmp_next} or to
> @code{cbranch_optab}.
> + @code{unsignedp} is used when converting @code{op0} and
> @code{op1}'s mode.
> +@end deftypefn
> +
> +@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_NEXT (rtx @var{prev},
> int @var{cmp_code}, rtx @var{op0}, rtx @var{op1}, int @var{bit_code})
> +This function emits a conditional comparison within a sequence of
> +conditional comparisons. The @code{prev} expression is the result of a
> +prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may
> +return @code{NULL} if the combination of @code{prev} and this
> +comparison is not supported, otherwise the result must be appropriate
> +for passing to @code{gen_ccmp_next} or @code{cbranch_optab}.
> +@code{bit_code} is AND or IOR, which is the op on the two compares.
> +@end deftypefn
> +
> @deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST
> (unsigned @var{nunroll}, struct loop *@var{loop}) This target hook
returns a
> new value for the number of times @var{loop} should be unrolled. The
> parameter @var{nunroll} is the number of times diff --git
> a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index dd72b98..e49f8f5 100644
> --- a/gcc/doc/tm.texi.in
> +++ b/gcc/doc/tm.texi.in
> @@ -8107,6 +8107,10 @@ build_type_attribute_variant (@var{mdecl},
>
> @hook TARGET_HAVE_CONDITIONAL_EXECUTION
>
> +@hook TARGET_GEN_CCMP_FIRST
> +
> +@hook TARGET_GEN_CCMP_NEXT
> +
> @hook TARGET_LOOP_UNROLL_ADJUST
>
> @defmac POWI_MAX_MULTS
> diff --git a/gcc/target.def b/gcc/target.def index e455211..6bbb907 100644
> --- a/gcc/target.def
> +++ b/gcc/target.def
> @@ -2320,6 +2320,27 @@ modes and they have different conditional
> execution capability, such as ARM.",
> bool, (void),
> default_have_conditional_execution)
>
> +DEFHOOK
> +(gen_ccmp_first,
> + "This function emits a comparison insn for the first of a sequence
> +of\n\ conditional comparisions. It returns a comparison expression
> +appropriate\n\ for passing to @code{gen_ccmp_next} or to
> +@code{cbranch_optab}.\n\ @code{unsignedp} is used when converting
> +@code{op0} and @code{op1}'s mode.", rtx, (int code, rtx op0, rtx op1),
> + NULL)
> +
> +DEFHOOK
> +(gen_ccmp_next,
> + "This function emits a conditional comparison within a sequence of\n\
> +conditional comparisons. The @code{prev} expression is the result of
> +a\n\:q prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}.
> +It may return\n\ @code{NULL} if the combination of @code{prev} and
> +this comparison is\n\ not supported, otherwise the result must be
> +appropriate for passing to\n\ @code{gen_ccmp_next} or
> +@code{cbranch_optab}. @code{bit_code}\n\ is AND or IOR, which is the
> +op on the two compares.", rtx, (rtx prev, int cmp_code, rtx op0, rtx
> +op1, int bit_code),
> + NULL)
> +
> /* Return a new value for loop unroll size. */ DEFHOOK
(loop_unroll_adjust,
[-- Attachment #2: 1-hooks.patch --]
[-- Type: application/octet-stream, Size: 4963 bytes --]
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 80e8bd6..78c40dc 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -6209,6 +6209,42 @@ A typical @code{ctrap} pattern looks like
"@dots{}")
@end smallexample
+@cindex @code{ccmp} instruction pattern
+@item @samp{ccmp}
+Conditional compare instruction. Operand 2 and 5 are RTLs which perform
+two comparisons. Operand 1 is AND or IOR, which operates on the result of
+operand 2 and 5.
+It uses recursive method to support more than two compares. e.g.
+
+ CC0 = CMP (a, b);
+ CC1 = CCMP (NE (CC0, 0), CMP (e, f));
+ ...
+ CCn = CCMP (NE (CCn-1, 0), CMP (...));
+
+Two target hooks are used to generate conditional compares. GEN_CCMP_FISRT
+is used to generate the first CMP. And GEN_CCMP_NEXT is used to generate the
+following CCMPs. Operand 1 is AND or IOR. Operand 3 is the result of
+GEN_CCMP_FISRT or a previous GEN_CCMP_NEXT. Operand 2 is NE.
+Operand 4, 5 and 6 is another compare expression.
+
+A typical CCMP pattern looks like
+
+@smallexample
+(define_insn "*ccmp_and_ior"
+ [(set (match_operand 0 "dominant_cc_register" "")
+ (compare
+ (match_operator 1
+ (match_operator 2 "comparison_operator"
+ [(match_operand 3 "dominant_cc_register")
+ (const_int 0)])
+ (match_operator 4 "comparison_operator"
+ [(match_operand 5 "register_operand")
+ (match_operand 6 "compare_operand"]))
+ (const_int 0)))]
+ ""
+ "@dots{}")
+@end smallexample
+
@cindex @code{prefetch} instruction pattern
@item @samp{prefetch}
This pattern, if defined, emits code for a non-faulting data prefetch
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 396909f..4ec7b9b 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -10968,6 +10968,23 @@ This target hook is required only when the target has several different
modes and they have different conditional execution capability, such as ARM.
@end deftypefn
+@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (int @var{code}, rtx @var{op0}, rtx @var{op1})
+This function emits a comparison insn for the first of a sequence of
+ conditional comparisions. It returns a comparison expression appropriate
+ for passing to @code{gen_ccmp_next} or to @code{cbranch_optab}.
+ @code{unsignedp} is used when converting @code{op0} and @code{op1}'s mode.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_NEXT (rtx @var{prev}, int @var{cmp_code}, rtx @var{op0}, rtx @var{op1}, int @var{bit_code})
+This function emits a conditional comparison within a sequence of
+ conditional comparisons. The @code{prev} expression is the result of a
+ prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may return
+ @code{NULL} if the combination of @code{prev} and this comparison is
+ not supported, otherwise the result must be appropriate for passing to
+ @code{gen_ccmp_next} or @code{cbranch_optab}. @code{bit_code}
+ is AND or IOR, which is the op on the two compares.
+@end deftypefn
+
@deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned @var{nunroll}, struct loop *@var{loop})
This target hook returns a new value for the number of times @var{loop}
should be unrolled. The parameter @var{nunroll} is the number of times
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 798c1aa..ec4e0d7 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -8043,6 +8043,10 @@ build_type_attribute_variant (@var{mdecl},
@hook TARGET_HAVE_CONDITIONAL_EXECUTION
+@hook TARGET_GEN_CCMP_FIRST
+
+@hook TARGET_GEN_CCMP_NEXT
+
@hook TARGET_LOOP_UNROLL_ADJUST
@defmac POWI_MAX_MULTS
diff --git a/gcc/target.def b/gcc/target.def
index ce11eae..c49295d 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -2322,6 +2322,27 @@ modes and they have different conditional execution capability, such as ARM.",
bool, (void),
default_have_conditional_execution)
+DEFHOOK
+(gen_ccmp_first,
+ "This function emits a comparison insn for the first of a sequence of\n\
+ conditional comparisions. It returns a comparison expression appropriate\n\
+ for passing to @code{gen_ccmp_next} or to @code{cbranch_optab}.\n\
+ @code{unsignedp} is used when converting @code{op0} and @code{op1}'s mode.",
+ rtx, (int code, rtx op0, rtx op1),
+ NULL)
+
+DEFHOOK
+(gen_ccmp_next,
+ "This function emits a conditional comparison within a sequence of\n\
+ conditional comparisons. The @code{prev} expression is the result of a\n\
+ prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may return\n\
+ @code{NULL} if the combination of @code{prev} and this comparison is\n\
+ not supported, otherwise the result must be appropriate for passing to\n\
+ @code{gen_ccmp_next} or @code{cbranch_optab}. @code{bit_code}\n\
+ is AND or IOR, which is the op on the two compares.",
+ rtx, (rtx prev, int cmp_code, rtx op0, rtx op1, int bit_code),
+ NULL)
+
/* Return a new value for loop unroll size. */
DEFHOOK
(loop_unroll_adjust,
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
2014-09-23 6:43 [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp) Zhenqiang Chen
@ 2014-09-23 7:26 ` pinskia
2014-10-11 15:03 ` Richard Henderson
1 sibling, 0 replies; 8+ messages in thread
From: pinskia @ 2014-09-23 7:26 UTC (permalink / raw)
To: Zhenqiang Chen; +Cc: <gcc-patches@gcc.gnu.org>
> On Sep 22, 2014, at 11:43 PM, Zhenqiang Chen <zhenqiang.chen@arm.com> wrote:
>
> Ping?
>
> Patch is attached for easy to apply.
Note I have been using an earlier version of this patch set in house and not have found any issues with it.
Thanks,
Andrew
>
> Thanks!
> -Zhenqiang
>
>> -----Original Message-----
>> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
>> owner@gcc.gnu.org] On Behalf Of Zhenqiang Chen
>> Sent: Monday, June 23, 2014 2:57 PM
>> To: gcc-patches@gcc.gnu.org
>> Subject: [PATCH, 1/10] two hooks for conditional compare (ccmp)
>>
>> Hi,
>>
>> The patch adds two hooks for backends to generate conditional compare
>> instructions.
>>
>> * gen_ccmp_first is for the first compare.
>> * gen_ccmp_next is for for the following compares.
>>
>> The patch is separated from
>> https://gcc.gnu.org/ml/gcc-patches/2014-02/msg01407.html.
>>
>> And the original discussion about the hooks was in thread:
>>
>> https://gcc.gnu.org/ml/gcc-patches/2013-10/msg02601.html
>>
>> OK for trunk?
>>
>> Thanks!
>> -Zhenqiang
>>
>> ChangeLog:
>> 2014-06-23 Zhenqiang Chen <zhenqiang.chen@linaro.org>
>>
>> * doc/md.texi (ccmp): Add description about conditional compare
>> instruction pattern.
>> (TARGET_GEN_CCMP_FIRST): Define.
>> (TARGET_GEN_CCMP_NEXT): Define.
>> * doc/tm.texi.in (TARGET_GEN_CCMP_FIRST,
>> TARGET_GEN_CCMP_NEXT): New.
>> * target.def (gen_ccmp_first, gen_ccmp_first): Add two new hooks.
>>
>> diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index e17ffca..988c288
> 100644
>> --- a/gcc/doc/md.texi
>> +++ b/gcc/doc/md.texi
>> @@ -6216,6 +6216,42 @@ A typical @code{ctrap} pattern looks like
>> "@dots{}")
>> @end smallexample
>>
>> +@cindex @code{ccmp} instruction pattern @item @samp{ccmp}
>> Conditional
>> +compare instruction. Operand 2 and 5 are RTLs which perform two
>> +comparisons. Operand 1 is AND or IOR, which operates on the result of
>> +operand 2 and 5.
>> +It uses recursive method to support more than two compares. e.g.
>> +
>> + CC0 = CMP (a, b);
>> + CC1 = CCMP (NE (CC0, 0), CMP (e, f)); ...
>> + CCn = CCMP (NE (CCn-1, 0), CMP (...));
>> +
>> +Two target hooks are used to generate conditional compares.
>> +GEN_CCMP_FISRT is used to generate the first CMP. And
>> GEN_CCMP_NEXT is
>> +used to generate the following CCMPs. Operand 1 is AND or IOR.
>> +Operand 3 is the result of GEN_CCMP_FISRT or a previous
>> GEN_CCMP_NEXT. Operand 2 is NE.
>> +Operand 4, 5 and 6 is another compare expression.
>> +
>> +A typical CCMP pattern looks like
>> +
>> +@smallexample
>> +(define_insn "*ccmp_and_ior"
>> + [(set (match_operand 0 "dominant_cc_register" "")
>> + (compare
>> + (match_operator 1
>> + (match_operator 2 "comparison_operator"
>> + [(match_operand 3 "dominant_cc_register")
>> + (const_int 0)])
>> + (match_operator 4 "comparison_operator"
>> + [(match_operand 5 "register_operand")
>> + (match_operand 6 "compare_operand"]))
>> + (const_int 0)))]
>> + ""
>> + "@dots{}")
>> +@end smallexample
>> +
>> @cindex @code{prefetch} instruction pattern @item @samp{prefetch} diff
>> --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index c272630..93f7c74 100644
>> --- a/gcc/doc/tm.texi
>> +++ b/gcc/doc/tm.texi
>> @@ -11021,6 +11021,23 @@ This target hook is required only when the
>> target has several different modes and they have different conditional
>> execution capability, such as ARM.
>> @end deftypefn
>>
>> +@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (int @var{code},
>> rtx @var{op0}, rtx @var{op1})
>> +This function emits a comparison insn for the first of a sequence of
>> +conditional comparisions. It returns a comparison expression
>> +appropriate for passing to @code{gen_ccmp_next} or to
>> @code{cbranch_optab}.
>> + @code{unsignedp} is used when converting @code{op0} and
>> @code{op1}'s mode.
>> +@end deftypefn
>> +
>> +@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_NEXT (rtx @var{prev},
>> int @var{cmp_code}, rtx @var{op0}, rtx @var{op1}, int @var{bit_code})
>> +This function emits a conditional comparison within a sequence of
>> +conditional comparisons. The @code{prev} expression is the result of a
>> +prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may
>> +return @code{NULL} if the combination of @code{prev} and this
>> +comparison is not supported, otherwise the result must be appropriate
>> +for passing to @code{gen_ccmp_next} or @code{cbranch_optab}.
>> +@code{bit_code} is AND or IOR, which is the op on the two compares.
>> +@end deftypefn
>> +
>> @deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST
>> (unsigned @var{nunroll}, struct loop *@var{loop}) This target hook
> returns a
>> new value for the number of times @var{loop} should be unrolled. The
>> parameter @var{nunroll} is the number of times diff --git
>> a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index dd72b98..e49f8f5 100644
>> --- a/gcc/doc/tm.texi.in
>> +++ b/gcc/doc/tm.texi.in
>> @@ -8107,6 +8107,10 @@ build_type_attribute_variant (@var{mdecl},
>>
>> @hook TARGET_HAVE_CONDITIONAL_EXECUTION
>>
>> +@hook TARGET_GEN_CCMP_FIRST
>> +
>> +@hook TARGET_GEN_CCMP_NEXT
>> +
>> @hook TARGET_LOOP_UNROLL_ADJUST
>>
>> @defmac POWI_MAX_MULTS
>> diff --git a/gcc/target.def b/gcc/target.def index e455211..6bbb907 100644
>> --- a/gcc/target.def
>> +++ b/gcc/target.def
>> @@ -2320,6 +2320,27 @@ modes and they have different conditional
>> execution capability, such as ARM.",
>> bool, (void),
>> default_have_conditional_execution)
>>
>> +DEFHOOK
>> +(gen_ccmp_first,
>> + "This function emits a comparison insn for the first of a sequence
>> +of\n\ conditional comparisions. It returns a comparison expression
>> +appropriate\n\ for passing to @code{gen_ccmp_next} or to
>> +@code{cbranch_optab}.\n\ @code{unsignedp} is used when converting
>> +@code{op0} and @code{op1}'s mode.", rtx, (int code, rtx op0, rtx op1),
>> + NULL)
>> +
>> +DEFHOOK
>> +(gen_ccmp_next,
>> + "This function emits a conditional comparison within a sequence of\n\
>> +conditional comparisons. The @code{prev} expression is the result of
>> +a\n\:q prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}.
>> +It may return\n\ @code{NULL} if the combination of @code{prev} and
>> +this comparison is\n\ not supported, otherwise the result must be
>> +appropriate for passing to\n\ @code{gen_ccmp_next} or
>> +@code{cbranch_optab}. @code{bit_code}\n\ is AND or IOR, which is the
>> +op on the two compares.", rtx, (rtx prev, int cmp_code, rtx op0, rtx
>> +op1, int bit_code),
>> + NULL)
>> +
>> /* Return a new value for loop unroll size. */ DEFHOOK
> (loop_unroll_adjust,
> <1-hooks.patch>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
2014-09-23 6:43 [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp) Zhenqiang Chen
2014-09-23 7:26 ` pinskia
@ 2014-10-11 15:03 ` Richard Henderson
2014-10-27 7:48 ` Zhenqiang Chen
1 sibling, 1 reply; 8+ messages in thread
From: Richard Henderson @ 2014-10-11 15:03 UTC (permalink / raw)
To: Zhenqiang Chen, gcc-patches
On 09/22/2014 11:43 PM, Zhenqiang Chen wrote:
>
> +@cindex @code{ccmp} instruction pattern
> +@item @samp{ccmp}
> +Conditional compare instruction. Operand 2 and 5 are RTLs which perform
> +two comparisons. Operand 1 is AND or IOR, which operates on the result of
> +operand 2 and 5.
> +It uses recursive method to support more than two compares. e.g.
> +
> + CC0 = CMP (a, b);
> + CC1 = CCMP (NE (CC0, 0), CMP (e, f));
> + ...
> + CCn = CCMP (NE (CCn-1, 0), CMP (...));
> +
> +Two target hooks are used to generate conditional compares. GEN_CCMP_FISRT
> +is used to generate the first CMP. And GEN_CCMP_NEXT is used to generate the
> +following CCMPs. Operand 1 is AND or IOR. Operand 3 is the result of
> +GEN_CCMP_FISRT or a previous GEN_CCMP_NEXT. Operand 2 is NE.
> +Operand 4, 5 and 6 is another compare expression.
> +
> +A typical CCMP pattern looks like
> +
> +@smallexample
> +(define_insn "*ccmp_and_ior"
> + [(set (match_operand 0 "dominant_cc_register" "")
> + (compare
> + (match_operator 1
> + (match_operator 2 "comparison_operator"
> + [(match_operand 3 "dominant_cc_register")
> + (const_int 0)])
> + (match_operator 4 "comparison_operator"
> + [(match_operand 5 "register_operand")
> + (match_operand 6 "compare_operand"]))
> + (const_int 0)))]
> + ""
> + "@dots{}")
> +@end smallexample
> +
This whole section should be removed. You do not have a named ccmp pattern.
Even your example below is an *unnamed pattern. This is an implementation
detail of the aarch64 backend.
Named patterns are used when that is the interface the middle-end uses to emit
code. But you're not using named patterns, you're using:
>
> +@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (int @var{code}, rtx @var{op0}, rtx @var{op1})
> +This function emits a comparison insn for the first of a sequence of
> + conditional comparisions. It returns a comparison expression appropriate
> + for passing to @code{gen_ccmp_next} or to @code{cbranch_optab}.
> + @code{unsignedp} is used when converting @code{op0} and @code{op1}'s mode.
> +@end deftypefn
> +
> +@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_NEXT (rtx @var{prev}, int @var{cmp_code}, rtx @var{op0}, rtx @var{op1}, int @var{bit_code})
> +This function emits a conditional comparison within a sequence of
> + conditional comparisons. The @code{prev} expression is the result of a
> + prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may return
> + @code{NULL} if the combination of @code{prev} and this comparison is
> + not supported, otherwise the result must be appropriate for passing to
> + @code{gen_ccmp_next} or @code{cbranch_optab}. @code{bit_code}
> + is AND or IOR, which is the op on the two compares.
> +@end deftypefn
Every place above where you refer to the arguments of the function should use
@var; you're using @code for most of them. Use @code{AND} and @code{IOR}.
r~
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
2014-10-11 15:03 ` Richard Henderson
@ 2014-10-27 7:48 ` Zhenqiang Chen
2014-10-27 15:04 ` Richard Henderson
0 siblings, 1 reply; 8+ messages in thread
From: Zhenqiang Chen @ 2014-10-27 7:48 UTC (permalink / raw)
To: 'Richard Henderson'; +Cc: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 3547 bytes --]
Thanks for the comments. All comments are accepted and the updated patch is
attached.
-Zhenqiang
> -----Original Message-----
> From: Richard Henderson [mailto:rth@redhat.com]
> Sent: Saturday, October 11, 2014 11:00 PM
> To: Zhenqiang Chen; gcc-patches@gcc.gnu.org
> Subject: Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
>
> On 09/22/2014 11:43 PM, Zhenqiang Chen wrote:
> >
> > +@cindex @code{ccmp} instruction pattern @item @samp{ccmp}
> Conditional
> > +compare instruction. Operand 2 and 5 are RTLs which perform two
> > +comparisons. Operand 1 is AND or IOR, which operates on the result
> > +of operand 2 and 5.
> > +It uses recursive method to support more than two compares. e.g.
> > +
> > + CC0 = CMP (a, b);
> > + CC1 = CCMP (NE (CC0, 0), CMP (e, f)); ...
> > + CCn = CCMP (NE (CCn-1, 0), CMP (...));
> > +
> > +Two target hooks are used to generate conditional compares.
> > +GEN_CCMP_FISRT is used to generate the first CMP. And
> GEN_CCMP_NEXT
> > +is used to generate the following CCMPs. Operand 1 is AND or IOR.
> > +Operand 3 is the result of GEN_CCMP_FISRT or a previous
> GEN_CCMP_NEXT. Operand 2 is NE.
> > +Operand 4, 5 and 6 is another compare expression.
> > +
> > +A typical CCMP pattern looks like
> > +
> > +@smallexample
> > +(define_insn "*ccmp_and_ior"
> > + [(set (match_operand 0 "dominant_cc_register" "")
> > + (compare
> > + (match_operator 1
> > + (match_operator 2 "comparison_operator"
> > + [(match_operand 3 "dominant_cc_register")
> > + (const_int 0)])
> > + (match_operator 4 "comparison_operator"
> > + [(match_operand 5 "register_operand")
> > + (match_operand 6 "compare_operand"]))
> > + (const_int 0)))]
> > + ""
> > + "@dots{}")
> > +@end smallexample
> > +
>
> This whole section should be removed. You do not have a named ccmp
> pattern.
> Even your example below is an *unnamed pattern. This is an
> implementation detail of the aarch64 backend.
>
> Named patterns are used when that is the interface the middle-end uses to
> emit code. But you're not using named patterns, you're using:
>
> >
> > +@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (int
> @var{code},
> > +rtx @var{op0}, rtx @var{op1}) This function emits a comparison insn
> > +for the first of a sequence of conditional comparisions. It returns
> > +a comparison expression appropriate for passing to
> @code{gen_ccmp_next} or to @code{cbranch_optab}.
> > + @code{unsignedp} is used when converting @code{op0} and
> @code{op1}'s mode.
> > +@end deftypefn
> > +
> > +@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_NEXT (rtx @var{prev},
> > +int @var{cmp_code}, rtx @var{op0}, rtx @var{op1}, int @var{bit_code})
> > +This function emits a conditional comparison within a sequence of
> > +conditional comparisons. The @code{prev} expression is the result of
> > +a prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It
> > +may return @code{NULL} if the combination of @code{prev} and this
> > +comparison is not supported, otherwise the result must be
> > +appropriate for passing to @code{gen_ccmp_next} or
> @code{cbranch_optab}. @code{bit_code} is AND or IOR, which is the op on
> the two compares.
> > +@end deftypefn
>
> Every place above where you refer to the arguments of the function should
> use @var; you're using @code for most of them. Use @code{AND} and
> @code{IOR}.
>
>
> r~
[-- Attachment #2: 1-hooks.patch --]
[-- Type: application/octet-stream, Size: 3501 bytes --]
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 5036d4f..e36af2f 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -10971,6 +10971,24 @@ This target hook is required only when the target has several different
modes and they have different conditional execution capability, such as ARM.
@end deftypefn
+@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (int @var{code}, rtx @var{op0}, rtx @var{op1})
+This function emits a comparison insn for the first of a sequence of
+ conditional comparisions. It returns a comparison expression appropriate
+ for passing to @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is
+ the @code{rtx_code} of the compare for @var{op0} and @var{op1}.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_NEXT (rtx @var{prev}, int @var{cmp_code}, rtx @var{op0}, rtx @var{op1}, int @var{bit_code})
+This function emits a conditional comparison within a sequence of
+ conditional comparisons. The @var{prev} expression is the result of a
+ prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may return
+ @var{NULL} if the combination of @var{prev} and this comparison is
+ not supported, otherwise the result must be appropriate for passing to
+ @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is the
+ @code{rtx_code} of the compare for @var{op0} and @var{op1}. @var{bit_code}
+ is @code{AND} or @code{IOR}, which is the op on the two compares.
+@end deftypefn
+
@deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned @var{nunroll}, struct loop *@var{loop})
This target hook returns a new value for the number of times @var{loop}
should be unrolled. The parameter @var{nunroll} is the number of times
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 5674e6c..7658e2b 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -8040,6 +8040,10 @@ build_type_attribute_variant (@var{mdecl},
@hook TARGET_HAVE_CONDITIONAL_EXECUTION
+@hook TARGET_GEN_CCMP_FIRST
+
+@hook TARGET_GEN_CCMP_NEXT
+
@hook TARGET_LOOP_UNROLL_ADJUST
@defmac POWI_MAX_MULTS
diff --git a/gcc/target.def b/gcc/target.def
index 4d90fc2..071dd4c 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -2322,6 +2322,28 @@ modes and they have different conditional execution capability, such as ARM.",
bool, (void),
default_have_conditional_execution)
+DEFHOOK
+(gen_ccmp_first,
+ "This function emits a comparison insn for the first of a sequence of\n\
+ conditional comparisions. It returns a comparison expression appropriate\n\
+ for passing to @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is\n\
+ the @code{rtx_code} of the compare for @var{op0} and @var{op1}.",
+ rtx, (int code, rtx op0, rtx op1),
+ NULL)
+
+DEFHOOK
+(gen_ccmp_next,
+ "This function emits a conditional comparison within a sequence of\n\
+ conditional comparisons. The @var{prev} expression is the result of a\n\
+ prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may return\n\
+ @var{NULL} if the combination of @var{prev} and this comparison is\n\
+ not supported, otherwise the result must be appropriate for passing to\n\
+ @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is the\n\
+ @code{rtx_code} of the compare for @var{op0} and @var{op1}. @var{bit_code}\n\
+ is @code{AND} or @code{IOR}, which is the op on the two compares.",
+ rtx, (rtx prev, int cmp_code, rtx op0, rtx op1, int bit_code),
+ NULL)
+
/* Return a new value for loop unroll size. */
DEFHOOK
(loop_unroll_adjust,
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
2014-10-27 7:48 ` Zhenqiang Chen
@ 2014-10-27 15:04 ` Richard Henderson
2014-10-29 10:29 ` Zhenqiang Chen
0 siblings, 1 reply; 8+ messages in thread
From: Richard Henderson @ 2014-10-27 15:04 UTC (permalink / raw)
To: Zhenqiang Chen; +Cc: gcc-patches
On 10/27/2014 12:47 AM, Zhenqiang Chen wrote:
> + @var{NULL} if the combination of @var{prev} and this comparison is\n\
@code{NULL}
Otherwise ok.
r~
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
2014-10-27 15:04 ` Richard Henderson
@ 2014-10-29 10:29 ` Zhenqiang Chen
2014-10-29 15:13 ` Richard Henderson
2014-11-14 9:09 ` Marcus Shawcroft
0 siblings, 2 replies; 8+ messages in thread
From: Zhenqiang Chen @ 2014-10-29 10:29 UTC (permalink / raw)
To: 'Richard Henderson'; +Cc: gcc-patches
[-- Attachment #1: Type: text/plain, Size: 451 bytes --]
> -----Original Message-----
> From: Richard Henderson [mailto:rth@redhat.com]
> Sent: Monday, October 27, 2014 10:56 PM
> To: Zhenqiang Chen
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
>
> On 10/27/2014 12:47 AM, Zhenqiang Chen wrote:
> > + @var{NULL} if the combination of @var{prev} and this comparison is\n\
>
> @code{NULL}
Thanks! Patch is updated.
-Zhenqiang
[-- Attachment #2: 1-hooks.patch --]
[-- Type: application/octet-stream, Size: 3503 bytes --]
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 5036d4f..44fcd11 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -10971,6 +10971,24 @@ This target hook is required only when the target has several different
modes and they have different conditional execution capability, such as ARM.
@end deftypefn
+@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_FIRST (int @var{code}, rtx @var{op0}, rtx @var{op1})
+This function emits a comparison insn for the first of a sequence of
+ conditional comparisions. It returns a comparison expression appropriate
+ for passing to @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is
+ the @code{rtx_code} of the compare for @var{op0} and @var{op1}.
+@end deftypefn
+
+@deftypefn {Target Hook} rtx TARGET_GEN_CCMP_NEXT (rtx @var{prev}, int @var{cmp_code}, rtx @var{op0}, rtx @var{op1}, int @var{bit_code})
+This function emits a conditional comparison within a sequence of
+ conditional comparisons. The @var{prev} expression is the result of a
+ prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may return
+ @code{NULL} if the combination of @var{prev} and this comparison is
+ not supported, otherwise the result must be appropriate for passing to
+ @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is the
+ @code{rtx_code} of the compare for @var{op0} and @var{op1}. @var{bit_code}
+ is @code{AND} or @code{IOR}, which is the op on the two compares.
+@end deftypefn
+
@deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned @var{nunroll}, struct loop *@var{loop})
This target hook returns a new value for the number of times @var{loop}
should be unrolled. The parameter @var{nunroll} is the number of times
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 5674e6c..7658e2b 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -8040,6 +8040,10 @@ build_type_attribute_variant (@var{mdecl},
@hook TARGET_HAVE_CONDITIONAL_EXECUTION
+@hook TARGET_GEN_CCMP_FIRST
+
+@hook TARGET_GEN_CCMP_NEXT
+
@hook TARGET_LOOP_UNROLL_ADJUST
@defmac POWI_MAX_MULTS
diff --git a/gcc/target.def b/gcc/target.def
index 4d90fc2..1f77839 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -2322,6 +2322,28 @@ modes and they have different conditional execution capability, such as ARM.",
bool, (void),
default_have_conditional_execution)
+DEFHOOK
+(gen_ccmp_first,
+ "This function emits a comparison insn for the first of a sequence of\n\
+ conditional comparisions. It returns a comparison expression appropriate\n\
+ for passing to @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is\n\
+ the @code{rtx_code} of the compare for @var{op0} and @var{op1}.",
+ rtx, (int code, rtx op0, rtx op1),
+ NULL)
+
+DEFHOOK
+(gen_ccmp_next,
+ "This function emits a conditional comparison within a sequence of\n\
+ conditional comparisons. The @var{prev} expression is the result of a\n\
+ prior call to @code{gen_ccmp_first} or @code{gen_ccmp_next}. It may return\n\
+ @code{NULL} if the combination of @var{prev} and this comparison is\n\
+ not supported, otherwise the result must be appropriate for passing to\n\
+ @code{gen_ccmp_next} or @code{cbranch_optab}. @var{code} is the\n\
+ @code{rtx_code} of the compare for @var{op0} and @var{op1}. @var{bit_code}\n\
+ is @code{AND} or @code{IOR}, which is the op on the two compares.",
+ rtx, (rtx prev, int cmp_code, rtx op0, rtx op1, int bit_code),
+ NULL)
+
/* Return a new value for loop unroll size. */
DEFHOOK
(loop_unroll_adjust,
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
2014-10-29 10:29 ` Zhenqiang Chen
@ 2014-10-29 15:13 ` Richard Henderson
2014-11-14 9:09 ` Marcus Shawcroft
1 sibling, 0 replies; 8+ messages in thread
From: Richard Henderson @ 2014-10-29 15:13 UTC (permalink / raw)
To: Zhenqiang Chen; +Cc: gcc-patches
On 10/29/2014 03:28 AM, Zhenqiang Chen wrote:
> Thanks! Patch is updated.
Ok.
r~
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
2014-10-29 10:29 ` Zhenqiang Chen
2014-10-29 15:13 ` Richard Henderson
@ 2014-11-14 9:09 ` Marcus Shawcroft
1 sibling, 0 replies; 8+ messages in thread
From: Marcus Shawcroft @ 2014-11-14 9:09 UTC (permalink / raw)
To: Zhenqiang Chen; +Cc: Richard Henderson, gcc-patches
On 29 October 2014 10:28, Zhenqiang Chen <zhenqiang.chen@arm.com> wrote:
>
>
>> -----Original Message-----
>> From: Richard Henderson [mailto:rth@redhat.com]
>> Sent: Monday, October 27, 2014 10:56 PM
>> To: Zhenqiang Chen
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp)
>>
>> On 10/27/2014 12:47 AM, Zhenqiang Chen wrote:
>> > + @var{NULL} if the combination of @var{prev} and this comparison is\n\
>>
>> @code{NULL}
>
> Thanks! Patch is updated.
>
> -Zhenqiang
Zhenqiang, This patch series now has explicit OK from Richard for all
the generic and aarch64 specific parts. You should go ahead and
commit.
Cheers
/Marcus
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2014-11-14 8:51 UTC | newest]
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2014-09-23 6:43 [Ping] [PATCH, 1/10] two hooks for conditional compare (ccmp) Zhenqiang Chen
2014-09-23 7:26 ` pinskia
2014-10-11 15:03 ` Richard Henderson
2014-10-27 7:48 ` Zhenqiang Chen
2014-10-27 15:04 ` Richard Henderson
2014-10-29 10:29 ` Zhenqiang Chen
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